добавил каталог с разведенной платой процессора
This commit is contained in:
parent
ec5e994fd1
commit
817cf99e98
16 changed files with 111042 additions and 3 deletions
3
.gitignore
vendored
3
.gitignore
vendored
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# ignore SolidWorks temporary files
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~$*.SLDPRT
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~$*.SLDASM
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83028
brd/processor_stm32f446x/fp-info-cache
Normal file
83028
brd/processor_stm32f446x/fp-info-cache
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File diff suppressed because it is too large
Load diff
3182
brd/processor_stm32f446x/stm32f446x-B_Cu.gbr
Normal file
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brd/processor_stm32f446x/stm32f446x-B_Cu.gbr
Normal file
File diff suppressed because it is too large
Load diff
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brd/processor_stm32f446x/stm32f446x-B_Mask.gbr
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brd/processor_stm32f446x/stm32f446x-B_Mask.gbr
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%TF.GenerationSoftware,KiCad,Pcbnew,(5.1.10)-1*%
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%TF.CreationDate,2022-03-11T13:55:32+03:00*%
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%TF.ProjectId,stm32f446x,73746d33-3266-4343-9436-782e6b696361,rev?*%
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%TF.SameCoordinates,Original*%
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%TF.FileFunction,Soldermask,Bot*%
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%TF.FilePolarity,Negative*%
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%FSLAX46Y46*%
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G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
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G04 Created by KiCad (PCBNEW (5.1.10)-1) date 2022-03-11 13:55:32*
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%MOMM*%
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%LPD*%
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G01*
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G04 APERTURE LIST*
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%ADD10C,1.700000*%
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%ADD11C,1.000000*%
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%ADD12C,1.500000*%
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%ADD13C,1.800000*%
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%ADD14R,1.800000X1.800000*%
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%ADD15C,1.600000*%
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%ADD16R,1.600000X1.600000*%
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G04 APERTURE END LIST*
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D10*
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%TO.C,xp1*%
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X121210000Y-62910000D03*
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X118670000Y-62910000D03*
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X118670000Y-65450000D03*
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X116130000Y-65450000D03*
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G36*
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G01*
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X111650000Y-66300000D02*
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X110450000Y-66300000D01*
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G75*
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G02*
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X110200000Y-66050000I0J250000D01*
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G01*
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X110200000Y-64850000D01*
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G75*
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G02*
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X110450000Y-64600000I250000J0D01*
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G01*
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X111650000Y-64600000D01*
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G75*
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G02*
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X111900000Y-64850000I0J-250000D01*
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G01*
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X111900000Y-66050000D01*
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G02*
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X111650000Y-66300000I-250000J0D01*
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G01*
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%TD*%
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D11*
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%TO.C,Y2*%
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X91720000Y-84510000D03*
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X91720000Y-81970000D03*
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%TD*%
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D12*
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%TO.C,Y1*%
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X91530000Y-89210000D03*
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X91530000Y-94110000D03*
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%TD*%
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D13*
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%TO.C,D4*%
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X82540000Y-60500000D03*
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D14*
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X80000000Y-60500000D03*
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%TD*%
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D13*
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%TO.C,D3*%
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X90040000Y-60500000D03*
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D14*
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X87500000Y-60500000D03*
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%TD*%
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D13*
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%TO.C,D2*%
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X97540000Y-60500000D03*
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D14*
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X95000000Y-60500000D03*
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%TD*%
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D15*
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%TO.C,C12*%
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X121600000Y-95450000D03*
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D16*
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X119100000Y-95450000D03*
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%TD*%
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D15*
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%TO.C,C6*%
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X121600000Y-88900000D03*
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D16*
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X119100000Y-88900000D03*
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%TD*%
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D15*
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%TO.C,C1*%
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X128230000Y-88900000D03*
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D16*
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X125730000Y-88900000D03*
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%TD*%
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D10*
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%TO.C,J1*%
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X74930000Y-124460000D03*
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X80010000Y-124460000D03*
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X90170000Y-124460000D03*
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X92710000Y-124460000D03*
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X95250000Y-124460000D03*
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X97790000Y-124460000D03*
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X100330000Y-124460000D03*
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X102870000Y-124460000D03*
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X105410000Y-124460000D03*
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X107950000Y-124460000D03*
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X110490000Y-124460000D03*
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X113030000Y-124460000D03*
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X115570000Y-124460000D03*
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X118110000Y-124460000D03*
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X120650000Y-124460000D03*
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X123190000Y-124460000D03*
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X74930000Y-121920000D03*
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X77470000Y-121920000D03*
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X80010000Y-121920000D03*
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X82550000Y-121920000D03*
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X85090000Y-121920000D03*
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X87630000Y-121920000D03*
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X90170000Y-121920000D03*
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X92710000Y-121920000D03*
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X95250000Y-121920000D03*
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X97790000Y-121920000D03*
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X100330000Y-121920000D03*
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X102870000Y-121920000D03*
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X105410000Y-121920000D03*
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X107950000Y-121920000D03*
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X110490000Y-121920000D03*
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X113030000Y-121920000D03*
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X115570000Y-121920000D03*
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X118110000Y-121920000D03*
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X120650000Y-121920000D03*
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G36*
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G01*
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X122590000Y-121070000D02*
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X123790000Y-121070000D01*
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G75*
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G02*
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X124040000Y-121320000I0J-250000D01*
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G01*
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X124040000Y-122520000D01*
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G75*
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G02*
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X123790000Y-122770000I-250000J0D01*
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G01*
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X122590000Y-122770000D01*
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G75*
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G02*
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X122340000Y-122520000I0J250000D01*
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G01*
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X122340000Y-121320000D01*
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G75*
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G02*
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X122590000Y-121070000I250000J0D01*
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G01*
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G37*
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%TD*%
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M02*
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15
brd/processor_stm32f446x/stm32f446x-B_Paste.gbr
Normal file
15
brd/processor_stm32f446x/stm32f446x-B_Paste.gbr
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@ -0,0 +1,15 @@
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%TF.GenerationSoftware,KiCad,Pcbnew,(5.1.10)-1*%
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%TF.CreationDate,2022-03-11T13:55:32+03:00*%
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%TF.ProjectId,stm32f446x,73746d33-3266-4343-9436-782e6b696361,rev?*%
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%TF.SameCoordinates,Original*%
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%TF.FileFunction,Paste,Bot*%
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%TF.FilePolarity,Positive*%
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%FSLAX46Y46*%
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G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
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G04 Created by KiCad (PCBNEW (5.1.10)-1) date 2022-03-11 13:55:32*
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%MOMM*%
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||||
%LPD*%
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||||
G01*
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G04 APERTURE LIST*
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G04 APERTURE END LIST*
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M02*
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15
brd/processor_stm32f446x/stm32f446x-B_SilkS.gbr
Normal file
15
brd/processor_stm32f446x/stm32f446x-B_SilkS.gbr
Normal file
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@ -0,0 +1,15 @@
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%TF.GenerationSoftware,KiCad,Pcbnew,(5.1.10)-1*%
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%TF.CreationDate,2022-03-11T13:55:32+03:00*%
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%TF.ProjectId,stm32f446x,73746d33-3266-4343-9436-782e6b696361,rev?*%
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%TF.SameCoordinates,Original*%
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%TF.FileFunction,Legend,Bot*%
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%TF.FilePolarity,Positive*%
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%FSLAX46Y46*%
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G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
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||||
G04 Created by KiCad (PCBNEW (5.1.10)-1) date 2022-03-11 13:55:32*
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%MOMM*%
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%LPD*%
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G01*
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G04 APERTURE LIST*
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G04 APERTURE END LIST*
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M02*
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46
brd/processor_stm32f446x/stm32f446x-Edge_Cuts.gbr
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brd/processor_stm32f446x/stm32f446x-Edge_Cuts.gbr
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%TF.GenerationSoftware,KiCad,Pcbnew,(5.1.10)-1*%
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%TF.CreationDate,2022-03-11T13:55:32+03:00*%
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%TF.ProjectId,stm32f446x,73746d33-3266-4343-9436-782e6b696361,rev?*%
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%TF.SameCoordinates,Original*%
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%TF.FileFunction,Profile,NP*%
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%FSLAX46Y46*%
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G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
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G04 Created by KiCad (PCBNEW (5.1.10)-1) date 2022-03-11 13:55:32*
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%MOMM*%
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%LPD*%
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G01*
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G04 APERTURE LIST*
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%TA.AperFunction,Profile*%
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%ADD10C,0.050000*%
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%TD*%
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G04 APERTURE END LIST*
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D10*
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X155000000Y-130000000D02*
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G75*
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G02*
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X150000000Y-135000000I-5000000J0D01*
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G01*
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X65000000Y-135000000D02*
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G75*
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G02*
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X60000000Y-130000000I0J5000000D01*
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||||
G01*
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||||
X150000000Y-50000000D02*
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G75*
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G02*
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X155000000Y-55000000I0J-5000000D01*
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||||
G01*
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||||
X60000000Y-55000000D02*
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||||
G75*
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||||
G02*
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||||
X65000000Y-50000000I5000000J0D01*
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||||
G01*
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X60000000Y-130000000D02*
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X60000000Y-55000000D01*
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X150000000Y-135000000D02*
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M02*
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4301
brd/processor_stm32f446x/stm32f446x-F_Cu.gbr
Normal file
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brd/processor_stm32f446x/stm32f446x-F_Cu.gbr
Normal file
File diff suppressed because it is too large
Load diff
3605
brd/processor_stm32f446x/stm32f446x-F_Mask.gbr
Normal file
3605
brd/processor_stm32f446x/stm32f446x-F_Mask.gbr
Normal file
File diff suppressed because it is too large
Load diff
3452
brd/processor_stm32f446x/stm32f446x-F_Paste.gbr
Normal file
3452
brd/processor_stm32f446x/stm32f446x-F_Paste.gbr
Normal file
File diff suppressed because it is too large
Load diff
2355
brd/processor_stm32f446x/stm32f446x-F_SilkS.gbr
Normal file
2355
brd/processor_stm32f446x/stm32f446x-F_SilkS.gbr
Normal file
File diff suppressed because it is too large
Load diff
574
brd/processor_stm32f446x/stm32f446x-cache.lib
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brd/processor_stm32f446x/stm32f446x-cache.lib
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EESchema-LIBRARY Version 2.4
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#encoding utf-8
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#
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# Connector_Generic_Conn_02x05_Odd_Even
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#
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DEF Connector_Generic_Conn_02x05_Odd_Even J 0 40 Y N 1 F N
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F0 "J" 50 300 50 H V C CNN
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F1 "Connector_Generic_Conn_02x05_Odd_Even" 50 -300 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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Connector*:*_2x??_*
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$ENDFPLIST
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DRAW
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S -50 -195 0 -205 1 1 6 N
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S -50 -95 0 -105 1 1 6 N
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S -50 5 0 -5 1 1 6 N
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S -50 105 0 95 1 1 6 N
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S -50 205 0 195 1 1 6 N
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S -50 250 150 -250 1 1 10 f
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S 150 -195 100 -205 1 1 6 N
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S 150 -95 100 -105 1 1 6 N
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S 150 5 100 -5 1 1 6 N
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S 150 105 100 95 1 1 6 N
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S 150 205 100 195 1 1 6 N
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X Pin_1 1 -200 200 150 R 50 50 1 1 P
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X Pin_10 10 300 -200 150 L 50 50 1 1 P
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X Pin_2 2 300 200 150 L 50 50 1 1 P
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X Pin_3 3 -200 100 150 R 50 50 1 1 P
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X Pin_4 4 300 100 150 L 50 50 1 1 P
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X Pin_5 5 -200 0 150 R 50 50 1 1 P
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X Pin_6 6 300 0 150 L 50 50 1 1 P
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X Pin_7 7 -200 -100 150 R 50 50 1 1 P
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X Pin_8 8 300 -100 150 L 50 50 1 1 P
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X Pin_9 9 -200 -200 150 R 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Connector_Generic_Conn_02x20_Odd_Even
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#
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DEF Connector_Generic_Conn_02x20_Odd_Even J 0 40 Y N 1 F N
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F0 "J" 50 1000 50 H V C CNN
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F1 "Connector_Generic_Conn_02x20_Odd_Even" 50 -1100 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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Connector*:*_2x??_*
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$ENDFPLIST
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DRAW
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S -50 -995 0 -1005 1 1 6 N
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S -50 -895 0 -905 1 1 6 N
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S -50 -795 0 -805 1 1 6 N
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S -50 -695 0 -705 1 1 6 N
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S -50 -595 0 -605 1 1 6 N
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S -50 -495 0 -505 1 1 6 N
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S -50 -395 0 -405 1 1 6 N
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S -50 -295 0 -305 1 1 6 N
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S -50 -195 0 -205 1 1 6 N
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S -50 -95 0 -105 1 1 6 N
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S -50 5 0 -5 1 1 6 N
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S -50 105 0 95 1 1 6 N
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S -50 205 0 195 1 1 6 N
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S -50 305 0 295 1 1 6 N
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S -50 405 0 395 1 1 6 N
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S -50 505 0 495 1 1 6 N
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S -50 605 0 595 1 1 6 N
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S -50 705 0 695 1 1 6 N
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S -50 805 0 795 1 1 6 N
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S -50 905 0 895 1 1 6 N
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S -50 950 150 -1050 1 1 10 f
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S 150 -995 100 -1005 1 1 6 N
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S 150 -895 100 -905 1 1 6 N
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S 150 -795 100 -805 1 1 6 N
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S 150 -695 100 -705 1 1 6 N
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S 150 -595 100 -605 1 1 6 N
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S 150 -495 100 -505 1 1 6 N
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S 150 -395 100 -405 1 1 6 N
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S 150 -295 100 -305 1 1 6 N
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S 150 -195 100 -205 1 1 6 N
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S 150 -95 100 -105 1 1 6 N
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S 150 5 100 -5 1 1 6 N
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S 150 105 100 95 1 1 6 N
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S 150 205 100 195 1 1 6 N
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S 150 305 100 295 1 1 6 N
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S 150 405 100 395 1 1 6 N
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S 150 505 100 495 1 1 6 N
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S 150 605 100 595 1 1 6 N
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S 150 705 100 695 1 1 6 N
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S 150 805 100 795 1 1 6 N
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S 150 905 100 895 1 1 6 N
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X Pin_1 1 -200 900 150 R 50 50 1 1 P
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X Pin_10 10 300 500 150 L 50 50 1 1 P
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X Pin_11 11 -200 400 150 R 50 50 1 1 P
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X Pin_12 12 300 400 150 L 50 50 1 1 P
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X Pin_13 13 -200 300 150 R 50 50 1 1 P
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X Pin_14 14 300 300 150 L 50 50 1 1 P
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X Pin_15 15 -200 200 150 R 50 50 1 1 P
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X Pin_16 16 300 200 150 L 50 50 1 1 P
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X Pin_17 17 -200 100 150 R 50 50 1 1 P
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X Pin_18 18 300 100 150 L 50 50 1 1 P
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X Pin_19 19 -200 0 150 R 50 50 1 1 P
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X Pin_2 2 300 900 150 L 50 50 1 1 P
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X Pin_20 20 300 0 150 L 50 50 1 1 P
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X Pin_21 21 -200 -100 150 R 50 50 1 1 P
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X Pin_22 22 300 -100 150 L 50 50 1 1 P
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X Pin_23 23 -200 -200 150 R 50 50 1 1 P
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X Pin_24 24 300 -200 150 L 50 50 1 1 P
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X Pin_25 25 -200 -300 150 R 50 50 1 1 P
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X Pin_26 26 300 -300 150 L 50 50 1 1 P
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X Pin_27 27 -200 -400 150 R 50 50 1 1 P
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X Pin_28 28 300 -400 150 L 50 50 1 1 P
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X Pin_29 29 -200 -500 150 R 50 50 1 1 P
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X Pin_3 3 -200 800 150 R 50 50 1 1 P
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X Pin_30 30 300 -500 150 L 50 50 1 1 P
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X Pin_31 31 -200 -600 150 R 50 50 1 1 P
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X Pin_32 32 300 -600 150 L 50 50 1 1 P
|
||||
X Pin_33 33 -200 -700 150 R 50 50 1 1 P
|
||||
X Pin_34 34 300 -700 150 L 50 50 1 1 P
|
||||
X Pin_35 35 -200 -800 150 R 50 50 1 1 P
|
||||
X Pin_36 36 300 -800 150 L 50 50 1 1 P
|
||||
X Pin_37 37 -200 -900 150 R 50 50 1 1 P
|
||||
X Pin_38 38 300 -900 150 L 50 50 1 1 P
|
||||
X Pin_39 39 -200 -1000 150 R 50 50 1 1 P
|
||||
X Pin_4 4 300 800 150 L 50 50 1 1 P
|
||||
X Pin_40 40 300 -1000 150 L 50 50 1 1 P
|
||||
X Pin_5 5 -200 700 150 R 50 50 1 1 P
|
||||
X Pin_6 6 300 700 150 L 50 50 1 1 P
|
||||
X Pin_7 7 -200 600 150 R 50 50 1 1 P
|
||||
X Pin_8 8 300 600 150 L 50 50 1 1 P
|
||||
X Pin_9 9 -200 500 150 R 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_C
|
||||
#
|
||||
DEF Device_C C 0 10 N Y 1 F N
|
||||
F0 "C" 25 100 50 H V L CNN
|
||||
F1 "Device_C" 25 -100 50 H V L CNN
|
||||
F2 "" 38 -150 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
C_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 2 0 1 20 -80 -30 80 -30 N
|
||||
P 2 0 1 20 -80 30 80 30 N
|
||||
X ~ 1 0 150 110 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 110 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_CP
|
||||
#
|
||||
DEF Device_CP C 0 10 N Y 1 F N
|
||||
F0 "C" 25 100 50 H V L CNN
|
||||
F1 "Device_CP" 25 -100 50 H V L CNN
|
||||
F2 "" 38 -150 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
CP_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -90 20 90 40 0 1 0 N
|
||||
S 90 -20 -90 -40 0 1 0 F
|
||||
P 2 0 1 0 -70 90 -30 90 N
|
||||
P 2 0 1 0 -50 110 -50 70 N
|
||||
X ~ 1 0 150 110 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 110 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_CP1
|
||||
#
|
||||
DEF Device_CP1 C 0 10 N N 1 F N
|
||||
F0 "C" 25 100 50 H V L CNN
|
||||
F1 "Device_CP1" 25 -100 50 H V L CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
CP_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
A 0 -150 128 1287 513 0 1 20 N -80 -50 80 -50
|
||||
P 2 0 1 20 -80 30 80 30 N
|
||||
P 2 0 1 0 -70 90 -30 90 N
|
||||
P 2 0 1 0 -50 70 -50 110 N
|
||||
X ~ 1 0 150 110 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 130 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_C_Small
|
||||
#
|
||||
DEF Device_C_Small C 0 10 N N 1 F N
|
||||
F0 "C" 10 70 50 H V L CNN
|
||||
F1 "Device_C_Small" 10 -80 50 H V L CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
C_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 2 0 1 13 -60 -20 60 -20 N
|
||||
P 2 0 1 12 -60 20 60 20 N
|
||||
X ~ 1 0 100 80 D 50 50 1 1 P
|
||||
X ~ 2 0 -100 80 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_Crystal
|
||||
#
|
||||
DEF Device_Crystal Y 0 40 N N 1 F N
|
||||
F0 "Y" 0 150 50 H V C CNN
|
||||
F1 "Device_Crystal" 0 -150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
Crystal*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -45 100 45 -100 0 1 12 N
|
||||
P 2 0 1 0 -100 0 -75 0 N
|
||||
P 2 0 1 20 -75 -50 -75 50 N
|
||||
P 2 0 1 20 75 -50 75 50 N
|
||||
P 2 0 1 0 100 0 75 0 N
|
||||
X 1 1 -150 0 50 R 50 50 1 1 P
|
||||
X 2 2 150 0 50 L 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_Crystal_GND3
|
||||
#
|
||||
DEF Device_Crystal_GND3 Y 0 40 Y N 1 F N
|
||||
F0 "Y" 0 225 50 H V C CNN
|
||||
F1 "Device_Crystal_GND3" 0 150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
Crystal*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -45 100 45 -100 0 1 12 N
|
||||
P 2 0 1 0 -100 0 -75 0 N
|
||||
P 2 0 1 20 -75 -50 -75 50 N
|
||||
P 2 0 1 0 0 -150 0 -140 N
|
||||
P 2 0 1 0 75 0 100 0 N
|
||||
P 2 0 1 20 75 50 75 -50 N
|
||||
P 4 0 1 0 -100 -90 -100 -140 100 -140 100 -90 N
|
||||
X 1 1 -150 0 50 R 50 50 1 1 P
|
||||
X 2 2 150 0 50 L 50 50 1 1 P
|
||||
X 3 3 0 -200 50 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_D_Small
|
||||
#
|
||||
DEF Device_D_Small D 0 10 N N 1 F N
|
||||
F0 "D" -50 80 50 H V L CNN
|
||||
F1 "Device_D_Small" -150 -80 50 H V L CNN
|
||||
F2 "" 0 0 50 V I C CNN
|
||||
F3 "" 0 0 50 V I C CNN
|
||||
$FPLIST
|
||||
TO-???*
|
||||
*_Diode_*
|
||||
*SingleDiode*
|
||||
D_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 2 0 1 10 -30 -40 -30 40 N
|
||||
P 2 0 1 0 -30 0 30 0 N
|
||||
P 4 0 1 10 30 -40 -30 0 30 40 30 -40 N
|
||||
X K 1 -100 0 70 R 50 50 1 1 P
|
||||
X A 2 100 0 70 L 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_L
|
||||
#
|
||||
DEF Device_L L 0 40 N N 1 F N
|
||||
F0 "L" -50 0 50 V V C CNN
|
||||
F1 "Device_L" 75 0 50 V V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
Choke_*
|
||||
*Coil*
|
||||
Inductor_*
|
||||
L_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
A 0 -75 25 -899 899 0 1 0 N 0 -100 0 -50
|
||||
A 0 -25 25 -899 899 0 1 0 N 0 -50 0 0
|
||||
A 0 25 25 -899 899 0 1 0 N 0 0 0 50
|
||||
A 0 75 25 -899 899 0 1 0 N 0 50 0 100
|
||||
X 1 1 0 150 50 D 50 50 1 1 P
|
||||
X 2 2 0 -150 50 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_LED
|
||||
#
|
||||
DEF Device_LED D 0 40 N N 1 F N
|
||||
F0 "D" 0 100 50 H V C CNN
|
||||
F1 "Device_LED" 0 -100 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
LED*
|
||||
LED_SMD:*
|
||||
LED_THT:*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 2 0 1 10 -50 -50 -50 50 N
|
||||
P 2 0 1 0 -50 0 50 0 N
|
||||
P 4 0 1 10 50 -50 50 50 -50 0 50 -50 N
|
||||
P 5 0 1 0 -120 -30 -180 -90 -150 -90 -180 -90 -180 -60 N
|
||||
P 5 0 1 0 -70 -30 -130 -90 -100 -90 -130 -90 -130 -60 N
|
||||
X K 1 -150 0 100 R 50 50 1 1 P
|
||||
X A 2 150 0 100 L 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_R
|
||||
#
|
||||
DEF Device_R R 0 0 N Y 1 F N
|
||||
F0 "R" 80 0 50 V V C CNN
|
||||
F1 "Device_R" 0 0 50 V V C CNN
|
||||
F2 "" -70 0 50 V I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
R_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -40 -100 40 100 0 1 10 N
|
||||
X ~ 1 0 150 50 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 50 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Diode_BAV99
|
||||
#
|
||||
DEF Diode_BAV99 D 0 20 Y N 1 F N
|
||||
F0 "D" 0 200 50 H V C CNN
|
||||
F1 "Diode_BAV99" 0 100 50 H V C CNN
|
||||
F2 "Package_TO_SOT_SMD:SOT-23" 0 -500 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
SOT?23*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
C 0 0 10 1 1 0 F
|
||||
P 2 0 1 0 -200 0 200 0 N
|
||||
P 2 1 1 0 0 0 0 -100 N
|
||||
P 3 1 1 8 -50 -50 -50 50 -50 50 N
|
||||
P 3 1 1 8 150 50 150 -50 150 -50 N
|
||||
P 6 1 1 8 -150 50 -50 0 -150 -50 -150 50 -150 50 -150 50 N
|
||||
P 6 1 1 8 50 50 150 0 50 -50 50 50 50 50 50 50 N
|
||||
X K 1 -300 0 100 R 50 50 1 1 P
|
||||
X A 2 300 0 100 L 50 50 1 1 P
|
||||
X K 3 0 -200 100 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Interface_UART_MAX485E
|
||||
#
|
||||
DEF Interface_UART_MAX485E U 0 20 Y Y 1 F N
|
||||
F0 "U" -240 450 50 H V C CNN
|
||||
F1 "Interface_UART_MAX485E" 30 450 50 H V L CNN
|
||||
F2 "" 0 -700 50 H I C CNN
|
||||
F3 "" 0 50 50 H I C CNN
|
||||
ALIAS MAX483E MAX485E MAX487E MAX1487E MAX3485 MAX3483 MAX3486
|
||||
$FPLIST
|
||||
DIP*W7.62mm*
|
||||
SOIC*3.9x4.9mm*P1.27mm*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
C -12 -145 14 0 1 10 F
|
||||
C -1 59 14 0 1 10 F
|
||||
C 65 75 14 0 1 10 F
|
||||
S -300 400 300 -500 0 1 10 f
|
||||
S 50 125 50 125 0 1 0 N
|
||||
P 2 0 1 10 -160 -200 -75 -200 N
|
||||
P 2 0 1 10 -160 100 -50 100 N
|
||||
P 2 0 1 10 -50 -126 -50 -136 N
|
||||
P 2 0 1 10 -25 -200 210 -200 N
|
||||
P 3 0 1 10 -160 -100 -50 -100 -50 -125 N
|
||||
P 3 0 1 10 0 50 0 0 -160 0 N
|
||||
P 3 0 1 10 50 125 150 125 150 -200 N
|
||||
P 3 0 1 10 100 75 100 -150 0 -150 N
|
||||
P 4 0 1 10 -75 -125 -75 -225 25 -175 -75 -125 N
|
||||
P 4 0 1 10 -50 100 50 150 50 50 -50 100 N
|
||||
P 4 0 1 10 75 75 175 75 175 100 210 100 N
|
||||
X RO 1 -400 100 100 R 50 50 1 1 O
|
||||
X ~RE 2 -400 0 100 R 50 50 1 1 I
|
||||
X DE 3 -400 -100 100 R 50 50 1 1 I
|
||||
X DI 4 -400 -200 100 R 50 50 1 1 I
|
||||
X GND 5 0 -600 100 U 50 50 1 1 W
|
||||
X A 6 400 -200 100 L 50 50 1 1 B
|
||||
X B 7 400 100 100 L 50 50 1 1 B
|
||||
X VCC 8 0 500 100 D 50 50 1 1 W
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# MCU_ST_STM32F4_STM32F446RETx
|
||||
#
|
||||
DEF MCU_ST_STM32F4_STM32F446RETx U 0 20 Y Y 1 F N
|
||||
F0 "U" -600 1650 50 H V L CNN
|
||||
F1 "MCU_ST_STM32F4_STM32F446RETx" 400 1650 50 H V L CNN
|
||||
F2 "Package_QFP:LQFP-64_10x10mm_P0.5mm" -600 -1700 50 H I R CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
ALIAS STM32F446RETx
|
||||
$FPLIST
|
||||
LQFP*10x10mm*P0.5mm*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -600 -1700 600 1600 0 1 10 f
|
||||
X VBAT 1 -200 1700 100 D 50 50 1 1 W
|
||||
X PC2 10 -700 -300 100 R 50 50 1 1 B
|
||||
X PC3 11 -700 -400 100 R 50 50 1 1 B
|
||||
X VSSA 12 200 -1800 100 U 50 50 1 1 W
|
||||
X VDDA 13 300 1700 100 D 50 50 1 1 W
|
||||
X PA0 14 700 1500 100 L 50 50 1 1 B
|
||||
X PA1 15 700 1400 100 L 50 50 1 1 B
|
||||
X PA2 16 700 1300 100 L 50 50 1 1 B
|
||||
X PA3 17 700 1200 100 L 50 50 1 1 B
|
||||
X VSS 18 -200 -1800 100 U 50 50 1 1 W
|
||||
X VDD 19 -100 1700 100 D 50 50 1 1 W
|
||||
X PC13 2 -700 -1400 100 R 50 50 1 1 B
|
||||
X PA4 20 700 1100 100 L 50 50 1 1 B
|
||||
X PA5 21 700 1000 100 L 50 50 1 1 B
|
||||
X PA6 22 700 900 100 L 50 50 1 1 B
|
||||
X PA7 23 700 800 100 L 50 50 1 1 B
|
||||
X PC4 24 -700 -500 100 R 50 50 1 1 B
|
||||
X PC5 25 -700 -600 100 R 50 50 1 1 B
|
||||
X PB0 26 700 -200 100 L 50 50 1 1 B
|
||||
X PB1 27 700 -300 100 L 50 50 1 1 B
|
||||
X PB2 28 700 -400 100 L 50 50 1 1 B
|
||||
X PB10 29 700 -1200 100 L 50 50 1 1 B
|
||||
X PC14 3 -700 -1500 100 R 50 50 1 1 B
|
||||
X VCAP_1 30 -700 1100 100 R 50 50 1 1 W
|
||||
X VSS 31 -100 -1800 100 U 50 50 1 1 W
|
||||
X VDD 32 0 1700 100 D 50 50 1 1 W
|
||||
X PB12 33 700 -1300 100 L 50 50 1 1 B
|
||||
X PB13 34 700 -1400 100 L 50 50 1 1 B
|
||||
X PB14 35 700 -1500 100 L 50 50 1 1 B
|
||||
X PB15 36 700 -1600 100 L 50 50 1 1 B
|
||||
X PC6 37 -700 -700 100 R 50 50 1 1 B
|
||||
X PC7 38 -700 -800 100 R 50 50 1 1 B
|
||||
X PC8 39 -700 -900 100 R 50 50 1 1 B
|
||||
X PC15 4 -700 -1600 100 R 50 50 1 1 B
|
||||
X PC9 40 -700 -1000 100 R 50 50 1 1 B
|
||||
X PA8 41 700 700 100 L 50 50 1 1 B
|
||||
X PA9 42 700 600 100 L 50 50 1 1 B
|
||||
X PA10 43 700 500 100 L 50 50 1 1 B
|
||||
X PA11 44 700 400 100 L 50 50 1 1 B
|
||||
X PA12 45 700 300 100 L 50 50 1 1 B
|
||||
X PA13 46 700 200 100 L 50 50 1 1 B
|
||||
X VSS 47 0 -1800 100 U 50 50 1 1 W
|
||||
X VDD 48 100 1700 100 D 50 50 1 1 W
|
||||
X PA14 49 700 100 100 L 50 50 1 1 B
|
||||
X PH0 5 -700 400 100 R 50 50 1 1 I
|
||||
X PA15 50 700 0 100 L 50 50 1 1 B
|
||||
X PC10 51 -700 -1100 100 R 50 50 1 1 B
|
||||
X PC11 52 -700 -1200 100 R 50 50 1 1 B
|
||||
X PC12 53 -700 -1300 100 R 50 50 1 1 B
|
||||
X PD2 54 -700 100 100 R 50 50 1 1 B
|
||||
X PB3 55 700 -500 100 L 50 50 1 1 B
|
||||
X PB4 56 700 -600 100 L 50 50 1 1 B
|
||||
X PB5 57 700 -700 100 L 50 50 1 1 B
|
||||
X PB6 58 700 -800 100 L 50 50 1 1 B
|
||||
X PB7 59 700 -900 100 L 50 50 1 1 B
|
||||
X PH1 6 -700 300 100 R 50 50 1 1 I
|
||||
X BOOT0 60 -700 1300 100 R 50 50 1 1 I
|
||||
X PB8 61 700 -1000 100 L 50 50 1 1 B
|
||||
X PB9 62 700 -1100 100 L 50 50 1 1 B
|
||||
X VSS 63 100 -1800 100 U 50 50 1 1 W
|
||||
X VDD 64 200 1700 100 D 50 50 1 1 W
|
||||
X NRST 7 -700 1500 100 R 50 50 1 1 I
|
||||
X PC0 8 -700 -100 100 R 50 50 1 1 B
|
||||
X PC1 9 -700 -200 100 R 50 50 1 1 B
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Regulator_Switching_LM2594HVM-3.3
|
||||
#
|
||||
DEF Regulator_Switching_LM2594HVM-3.3 U 0 20 Y Y 1 F N
|
||||
F0 "U" -300 250 50 H V L CNN
|
||||
F1 "Regulator_Switching_LM2594HVM-3.3" 0 250 50 H V L CNN
|
||||
F2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" 200 -250 50 H I L CIN
|
||||
F3 "" 0 100 50 H I C CNN
|
||||
ALIAS LM2594M-5.0 LM2594M-12 LM2594M-ADJ LM2594HVM-3.3 LM2594HVM-5.0 LM2594HVM-12 LM2594HVM-ADJ
|
||||
$FPLIST
|
||||
SOIC*3.9x4.9mm*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -300 200 300 -200 0 1 10 f
|
||||
X NC 1 -200 -300 100 U 50 50 1 1 P
|
||||
X NC 2 -100 -300 100 U 50 50 1 1 P
|
||||
X NC 3 0 -300 100 U 50 50 1 1 P
|
||||
X FB 4 400 100 100 L 50 50 1 1 I
|
||||
X ~ON~/OFF 5 -400 0 100 R 50 50 1 1 I
|
||||
X GND 6 200 -300 100 U 50 50 1 1 W
|
||||
X VIN 7 -400 100 100 R 50 50 1 1 W
|
||||
X OUT 8 400 0 100 L 50 50 1 1 O
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# kicad_Library_PROGRAMMATOR
|
||||
#
|
||||
DEF kicad_Library_PROGRAMMATOR xp 0 40 Y Y 1 F N
|
||||
F0 "xp" -350 900 50 H V C CNN
|
||||
F1 "kicad_Library_PROGRAMMATOR" -400 200 50 H V C CNN
|
||||
F2 "Connector_IDC:IDC-Header_2x05_P2.54mm_Vertical" -350 900 50 H I C CNN
|
||||
F3 "" -350 900 50 H I C CNN
|
||||
DRAW
|
||||
S -700 800 50 300 0 1 0 f
|
||||
X GND 1 -800 750 100 R 50 50 1 1 P
|
||||
X +5V 10 150 350 100 L 50 50 1 1 w
|
||||
X +3V 2 150 750 100 L 50 50 1 1 w
|
||||
X RESET 3 -800 650 100 R 50 50 1 1 I
|
||||
X BOOT 4 150 650 100 L 50 50 1 1 I
|
||||
X RX 5 -800 550 100 R 50 50 1 1 I
|
||||
X TX 6 150 550 100 L 50 50 1 1 O
|
||||
X SWDCLK 7 -800 450 100 R 50 50 1 1 I
|
||||
X SWDDTA 8 150 450 100 L 50 50 1 1 B
|
||||
X GND 9 -800 350 100 R 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+24V
|
||||
#
|
||||
DEF power_+24V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+24V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +24V 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+3.3V
|
||||
#
|
||||
DEF power_+3.3V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+3.3V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
ALIAS +3.3V
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +3V3 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_GND
|
||||
#
|
||||
DEF power_GND #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -250 50 H I C CNN
|
||||
F1 "power_GND" 0 -150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
|
||||
X GND 1 0 0 0 D 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
128
brd/processor_stm32f446x/stm32f446x-job.gbrjob
Normal file
128
brd/processor_stm32f446x/stm32f446x-job.gbrjob
Normal file
|
@ -0,0 +1,128 @@
|
|||
{
|
||||
"Header":
|
||||
{
|
||||
"GenerationSoftware":
|
||||
{
|
||||
"Vendor": "KiCad",
|
||||
"Application": "Pcbnew",
|
||||
"Version": "(5.1.10)-1"
|
||||
},
|
||||
"CreationDate": "2022-03-11T13:55:32+03:00"
|
||||
},
|
||||
"GeneralSpecs":
|
||||
{
|
||||
"ProjectId":
|
||||
{
|
||||
"Name": "stm32f446x",
|
||||
"GUID": "73746d33-3266-4343-9436-782e6b696361",
|
||||
"Revision": "rev?"
|
||||
},
|
||||
"Size":
|
||||
{
|
||||
"X": 95.050,
|
||||
"Y": 85.050
|
||||
},
|
||||
"LayerNumber": 2,
|
||||
"BoardThickness": 1.600
|
||||
},
|
||||
"DesignRules":
|
||||
[
|
||||
{
|
||||
"Layers": "Outer",
|
||||
"PadToPad": 0.200,
|
||||
"PadToTrack": 0.200,
|
||||
"TrackToTrack": 0.200,
|
||||
"MinLineWidth": 0.250,
|
||||
"TrackToRegion": 0.508,
|
||||
"RegionToRegion": 0.508
|
||||
}
|
||||
],
|
||||
"FilesAttributes":
|
||||
[
|
||||
{
|
||||
"Path": "stm32f446x-F_Cu.gbr",
|
||||
"FileFunction": "Copper,L1,Top",
|
||||
"FilePolarity": "Positive"
|
||||
},
|
||||
{
|
||||
"Path": "stm32f446x-B_Cu.gbr",
|
||||
"FileFunction": "Copper,L2,Bot",
|
||||
"FilePolarity": "Positive"
|
||||
},
|
||||
{
|
||||
"Path": "stm32f446x-F_Paste.gbr",
|
||||
"FileFunction": "SolderPaste,Top",
|
||||
"FilePolarity": "Positive"
|
||||
},
|
||||
{
|
||||
"Path": "stm32f446x-B_Paste.gbr",
|
||||
"FileFunction": "SolderPaste,Bot",
|
||||
"FilePolarity": "Positive"
|
||||
},
|
||||
{
|
||||
"Path": "stm32f446x-F_SilkS.gbr",
|
||||
"FileFunction": "Legend,Top",
|
||||
"FilePolarity": "Positive"
|
||||
},
|
||||
{
|
||||
"Path": "stm32f446x-B_SilkS.gbr",
|
||||
"FileFunction": "Legend,Bot",
|
||||
"FilePolarity": "Positive"
|
||||
},
|
||||
{
|
||||
"Path": "stm32f446x-F_Mask.gbr",
|
||||
"FileFunction": "SolderMask,Top",
|
||||
"FilePolarity": "Negative"
|
||||
},
|
||||
{
|
||||
"Path": "stm32f446x-B_Mask.gbr",
|
||||
"FileFunction": "SolderMask,Bot",
|
||||
"FilePolarity": "Negative"
|
||||
},
|
||||
{
|
||||
"Path": "stm32f446x-Edge_Cuts.gbr",
|
||||
"FileFunction": "Profile",
|
||||
"FilePolarity": "Positive"
|
||||
}
|
||||
],
|
||||
"MaterialStackup":
|
||||
[
|
||||
{
|
||||
"Type": "Legend",
|
||||
"Notes": "Layer F.SilkS"
|
||||
},
|
||||
{
|
||||
"Type": "SolderPaste",
|
||||
"Notes": "Layer F.Paste"
|
||||
},
|
||||
{
|
||||
"Type": "SolderMask",
|
||||
"Notes": "Layer F.Mask"
|
||||
},
|
||||
{
|
||||
"Type": "Copper",
|
||||
"Notes": "Layer F.Cu"
|
||||
},
|
||||
{
|
||||
"Type": "Dielectric",
|
||||
"Material": "FR4",
|
||||
"Notes": "Layers L1/L2"
|
||||
},
|
||||
{
|
||||
"Type": "Copper",
|
||||
"Notes": "Layer B.Cu"
|
||||
},
|
||||
{
|
||||
"Type": "SolderMask",
|
||||
"Notes": "Layer B.Mask"
|
||||
},
|
||||
{
|
||||
"Type": "SolderPaste",
|
||||
"Notes": "Layer B.Paste"
|
||||
},
|
||||
{
|
||||
"Type": "Legend",
|
||||
"Notes": "Layer B.SilkS"
|
||||
}
|
||||
]
|
||||
}
|
6853
brd/processor_stm32f446x/stm32f446x.kicad_pcb
Normal file
6853
brd/processor_stm32f446x/stm32f446x.kicad_pcb
Normal file
File diff suppressed because it is too large
Load diff
263
brd/processor_stm32f446x/stm32f446x.pro
Normal file
263
brd/processor_stm32f446x/stm32f446x.pro
Normal file
|
@ -0,0 +1,263 @@
|
|||
update=21.03.2022 13:28:54
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[schematic_editor]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
PlotDirectoryName=
|
||||
SubpartIdSeparator=0
|
||||
SubpartFirstId=65
|
||||
NetFmtName=Pcbnew
|
||||
SpiceAjustPassiveValues=0
|
||||
LabSize=50
|
||||
ERC_TestSimilarLabels=1
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=
|
||||
CopperLayerCount=2
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.2
|
||||
MinViaDiameter=0.4
|
||||
MinViaDrill=0.3
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.25
|
||||
TrackWidth2=0.3
|
||||
TrackWidth3=0.35
|
||||
TrackWidth4=0.5
|
||||
TrackWidth5=1
|
||||
ViaDiameter1=0.8
|
||||
ViaDrill1=0.4
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.05
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0
|
||||
SolderMaskMinWidth=0
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=-0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.22
|
||||
TrackWidth=0.25
|
||||
ViaDiameter=0.8
|
||||
ViaDrill=0.4
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/1]
|
||||
Name=gap0.3
|
||||
Clearance=0.3
|
||||
TrackWidth=0.25
|
||||
ViaDiameter=0.8
|
||||
ViaDrill=0.4
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.3
|
||||
dPairViaGap=0.25
|
3055
brd/processor_stm32f446x/stm32f446x.sch
Normal file
3055
brd/processor_stm32f446x/stm32f446x.sch
Normal file
File diff suppressed because it is too large
Load diff
Loading…
Add table
Add a link
Reference in a new issue