diff --git a/controller/fw/bootloader/.cproject b/controller/fw/bootloader/.cproject
index 6a28c79..388071c 100644
--- a/controller/fw/bootloader/.cproject
+++ b/controller/fw/bootloader/.cproject
@@ -173,4 +173,5 @@
+
\ No newline at end of file
diff --git a/controller/fw/bootloader/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs b/controller/fw/bootloader/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs
new file mode 100644
index 0000000..98a69fc
--- /dev/null
+++ b/controller/fw/bootloader/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs
@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+sfrviewstate={"fFavorites"\:{"fLists"\:{}},"fProperties"\:{"fNodeProperties"\:{}}}
diff --git a/controller/fw/bootloader/.settings/stm32cubeide.project.prefs b/controller/fw/bootloader/.settings/stm32cubeide.project.prefs
index 617d587..bb1c17a 100644
--- a/controller/fw/bootloader/.settings/stm32cubeide.project.prefs
+++ b/controller/fw/bootloader/.settings/stm32cubeide.project.prefs
@@ -1,4 +1,5 @@
+2F62501ED4689FB349E356AB974DBE57=9E2193C46F66F22FF98D84DBB5C34D23
635E684B79701B039C64EA45C3F84D30=C781131A7B2809FF4382EAF5B3C6C1B2
-8DF89ED150041C4CBC7CB9A9CAA90856=54C15FA5FFB683D1E813986C9EAD009D
+8DF89ED150041C4CBC7CB9A9CAA90856=9E2193C46F66F22FF98D84DBB5C34D23
DC22A860405A8BF2F2C095E5B6529F12=54C15FA5FFB683D1E813986C9EAD009D
eclipse.preferences.version=1
diff --git a/controller/fw/bootloader/Core/Src/can.c b/controller/fw/bootloader/Core/Src/can.c
index 075d116..b97de37 100644
--- a/controller/fw/bootloader/Core/Src/can.c
+++ b/controller/fw/bootloader/Core/Src/can.c
@@ -44,7 +44,7 @@ void MX_CAN2_Init(void)
hcan2.Init.TimeSeg1 = CAN_BS1_12TQ;
hcan2.Init.TimeSeg2 = CAN_BS2_2TQ;
hcan2.Init.TimeTriggeredMode = DISABLE;
- hcan2.Init.AutoBusOff = DISABLE;
+ hcan2.Init.AutoBusOff = ENABLE;
hcan2.Init.AutoWakeUp = DISABLE;
hcan2.Init.AutoRetransmission = DISABLE;
hcan2.Init.ReceiveFifoLocked = DISABLE;
diff --git a/controller/fw/bootloader/Core/Src/main.c b/controller/fw/bootloader/Core/Src/main.c
index ddab75e..8752317 100644
--- a/controller/fw/bootloader/Core/Src/main.c
+++ b/controller/fw/bootloader/Core/Src/main.c
@@ -17,18 +17,19 @@
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
-#include "flash.h"
+#include "main.h"
#include "adc.h"
#include "can.h"
#include "spi.h"
#include "tim.h"
#include "usart.h"
#include "gpio.h"
-#include
-#include "can_reg.h"
+
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
-
+#include "flash.h"
+#include "can_reg.h"
+#include
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
@@ -80,7 +81,7 @@ void send_ack(uint8_t status) {
uint8_t tx_data[1] = {status};
uint32_t tx_mailbox;
- tx_header.ExtId = ACK_CAN_ID; // id = 0x05
+ tx_header.StdId = ACK_CAN_ID; // id = 0x05
tx_header.IDE = CAN_ID_STD; //standart id
tx_header.RTR = CAN_RTR_DATA; // data frame
tx_header.DLC = 1; // data len = 1 byte
@@ -107,11 +108,11 @@ bool verify_firmware() {
void process_can_message(CAN_RxHeaderTypeDef *header, uint8_t *data) {
- msg_id = header->ExtId;
+ msg_id = header->StdId;
/* 0x697
69 - slave addr
7 || 8 - REG_READ or REG_WRITE */
- id_x = (msg_id >> 4) & 0xFFFF; // get addr
+ id_x = (msg_id >> 4) & 0xFFF; // get addr
msg_ch = msg_id & 0xF; // check cmd
// Check addr
@@ -144,7 +145,6 @@ void process_can_message(CAN_RxHeaderTypeDef *header, uint8_t *data) {
send_ack(0xAA);
write_param(firmw, 0); // Reset firmware update
fw_update = false;
-
HAL_Delay(500);
NVIC_SystemReset();
} else {
@@ -156,20 +156,33 @@ void process_can_message(CAN_RxHeaderTypeDef *header, uint8_t *data) {
}
}
-void jump_to_app() {
+void jump_to_app(void) {
+ HAL_RCC_DeInit();
+ HAL_DeInit();
__disable_irq();
- jump = *(volatile uint32_t*)(APP_ADDRESS + 4);
- void (*app_entry)(void);
- app_entry = (void (*)(void))jump;
+
+ uint32_t *app_vector_table = (uint32_t*)APP_ADDRESS;
- for (uint32_t i = 0; i < 8; i++) {
+ // RESET ALL Interrupt
+ for (uint8_t i = 0; i < 8; i++) {
+ NVIC->ICER[i] = 0xFFFFFFFF;
NVIC->ICPR[i] = 0xFFFFFFFF;
}
- __set_MSP(*(volatile uint32_t*)APP_ADDRESS);
- // SCB->VTOR = (uint32_t)0x08008004;
- app_entry();
+ // APP_ADDR
+ __set_MSP(app_vector_table[0]);
+
+ // Point to go
+ uint32_t app_entry = *(app_vector_table + 1); //APP_ADDR + 4
+ void (*application)(void);
+ application = (void (*)(void))app_entry;
+
+ // Go to application
+ application();
+
+ // If we return go to infinity loop
+ while(1);
}
bool is_app_valid() {
@@ -178,11 +191,11 @@ bool is_app_valid() {
// Check stack pointer
bool sp_valid = (app_vector[0] >= 0x20000000) &&
- (app_vector[0] <= (0x20000000 + 128*1024)); // Для STM32 с 128K RAM
+ (app_vector[0] <= (0x20000000 + 128*1024));
// check reset_handler
bool pc_valid = (app_vector[1] >= 0x08000000) &&
- (app_vector[1] <= (0x08000000 + 1024*1024)); // Для 1MB Flash
+ (app_vector[1] <= (0x08000000 + 1024*1024));
// check two words on reset value
bool not_erased = (app_vector[0] != 0xFFFFFFFF) &&
@@ -200,29 +213,7 @@ int main(void)
{
/* USER CODE BEGIN 1 */
- // Настройка GPIO
- RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN;
- GPIOC->MODER |= GPIO_MODER_MODE10_0 | GPIO_MODER_MODE11_0;
- GPIOC->ODR &= ~GPIO_ODR_OD11;
- GPIOC->ODR |= GPIO_ODR_OD10;
- flash_record = load_params();
- if(flash_record[firmw].value == UPDATE_FLAG) {
- fw_update = true;
- for(int i = 0; i < 5;i++){
- GPIOC->ODR ^= GPIO_ODR_OD10; // Indecate message
- HAL_Delay(100);
- }
- // write_param(firmw,0); //reset flasg
- erase_flash_pages();
- }
- else{
- // for st-link update, because he doesnt reset flag_update
- if(is_app_valid()) jump_to_app(); //firmware exist
- else fw_update = true; //firmware doesnt exist, but we in bootloader
- }
-
- GPIOC->ODR |= GPIO_ODR_OD10;
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
@@ -255,29 +246,82 @@ int main(void)
MX_NVIC_Init();
/* USER CODE BEGIN 2 */
+ // Настройка GPIO
+ RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN;
+ GPIOC->MODER |= GPIO_MODER_MODE10_0 | GPIO_MODER_MODE11_0;
+ GPIOC->ODR &= ~GPIO_ODR_OD11;
+ GPIOC->ODR |= GPIO_ODR_OD10;
+
+ flash_record = load_params();
+ if(flash_record[firmw].value == UPDATE_FLAG) {
+ fw_update = true;
+ for(int i = 0; i < 5;i++){
+ GPIOC->ODR ^= GPIO_ODR_OD10; // Indecate message
+ HAL_Delay(100);
+ }
+ // write_param(firmw,0); //reset flasg
+ erase_flash_pages();
+ }
+ else{
+ // for st-link update, because he doesnt reset flag_update
+ if(is_app_valid()) jump_to_app(); //firmware exist
+ else fw_update = true; //firmware doesnt exist, but we in bootloader
+ }
+
+
+ CAN_FilterTypeDef can_filter = {
+ .FilterBank = 14, // Bank 14-27 for CAN2
+ .FilterMode = CAN_FILTERMODE_IDMASK,
+ .FilterScale = CAN_FILTERSCALE_32BIT,
+ .FilterIdHigh = 0x0000,
+ .FilterIdLow = 0x0000,
+ .FilterMaskIdHigh = 0x0000,
+ .FilterMaskIdLow = 0x0000,
+ .FilterFIFOAssignment = CAN_RX_FIFO0,
+ .FilterActivation = ENABLE,
+ .SlaveStartFilterBank = 14
+ };
+
+ if (HAL_CAN_ConfigFilter(&hcan2, &can_filter) != HAL_OK) {
+ Error_Handler();
+ }
+
+ if (HAL_CAN_Start(&hcan2) != HAL_OK) {
+ Error_Handler();
+ }
+
+ GPIOC->ODR |= GPIO_ODR_OD10;
+
+// CAN_TxHeaderTypeDef test_header = {
+// .StdId = 0x123,
+// .IDE = CAN_ID_STD,
+// .RTR = CAN_RTR_DATA,
+// .DLC = 1,
+// .TransmitGlobalTime = DISABLE
+// };
+// uint8_t test_data = 0x55;
+// uint32_t tx_mailbox;
+// HAL_CAN_AddTxMessage(&hcan2, &test_header, &test_data, &tx_mailbox);
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1) {
- if(fw_update) {
- CAN_RxHeaderTypeDef rx_header;
- uint8_t rx_data[8];
- HAL_StatusTypeDef status;
+ if (fw_update) {
+ uint32_t rf0r = CAN2->RF0R;
- // Check message
- if(HAL_CAN_GetRxFifoFillLevel(&hcan2, CAN_RX_FIFO0) > 0) {
- status = HAL_CAN_GetRxMessage(&hcan2, CAN_RX_FIFO0, &rx_header, rx_data);
+ // Check count of FIFO
+ if ((rf0r & CAN_RF0R_FMP0) > 0) {
+ CAN_RxHeaderTypeDef rx_header;
+ uint8_t rx_data[8];
- if(status == HAL_OK) {
- // check message IDE standart
- if(rx_header.IDE == CAN_ID_STD) {
- process_can_message(&rx_header, rx_data);
+
+ if (HAL_CAN_GetRxMessage(&hcan2, CAN_RX_FIFO0, &rx_header, rx_data) == HAL_OK) {
+ process_can_message(&rx_header, rx_data);
+ }
}
- }
+ HAL_Delay(1);
}
-
- }
}
/* USER CODE END WHILE */
@@ -285,9 +329,6 @@ int main(void)
/* USER CODE END 3 */
}
-
-
-
/**
* @brief System Clock Configuration
* @retval None
diff --git a/controller/fw/bootloader/Core/Startup/startup_stm32f446retx.s b/controller/fw/bootloader/Core/Startup/startup_stm32f446retx.s
index 7040eaf..2835de2 100644
--- a/controller/fw/bootloader/Core/Startup/startup_stm32f446retx.s
+++ b/controller/fw/bootloader/Core/Startup/startup_stm32f446retx.s
@@ -97,7 +97,7 @@ LoopFillZerobss:
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
- bl main
+ bl main
bx lr
.size Reset_Handler, .-Reset_Handler
diff --git a/controller/fw/bootloader/Debug/Core/Src/adc.o b/controller/fw/bootloader/Debug/Core/Src/adc.o
index 97a723e..2ab6afe 100644
Binary files a/controller/fw/bootloader/Debug/Core/Src/adc.o and b/controller/fw/bootloader/Debug/Core/Src/adc.o differ
diff --git a/controller/fw/bootloader/Debug/Core/Src/can.o b/controller/fw/bootloader/Debug/Core/Src/can.o
index d02bab1..70bf2a9 100644
Binary files a/controller/fw/bootloader/Debug/Core/Src/can.o and b/controller/fw/bootloader/Debug/Core/Src/can.o differ
diff --git a/controller/fw/bootloader/Debug/Core/Src/flash.o b/controller/fw/bootloader/Debug/Core/Src/flash.o
index a734971..b500e89 100644
Binary files a/controller/fw/bootloader/Debug/Core/Src/flash.o and b/controller/fw/bootloader/Debug/Core/Src/flash.o differ
diff --git a/controller/fw/bootloader/Debug/Core/Src/gpio.o b/controller/fw/bootloader/Debug/Core/Src/gpio.o
index ccc84bd..c23abed 100644
Binary files a/controller/fw/bootloader/Debug/Core/Src/gpio.o and b/controller/fw/bootloader/Debug/Core/Src/gpio.o differ
diff --git a/controller/fw/bootloader/Debug/Core/Src/main.cyclo b/controller/fw/bootloader/Debug/Core/Src/main.cyclo
index e3e386e..a8f7d6b 100644
--- a/controller/fw/bootloader/Debug/Core/Src/main.cyclo
+++ b/controller/fw/bootloader/Debug/Core/Src/main.cyclo
@@ -1,11 +1,11 @@
../Drivers/CMSIS/Include/core_cm4.h:1938:34:__NVIC_SystemReset 1
-../Core/Src/main.c:78:6:send_ack 1
-../Core/Src/main.c:102:6:verify_firmware 1
-../Core/Src/main.c:109:6:process_can_message 8
+../Core/Src/main.c:79:6:send_ack 1
+../Core/Src/main.c:103:6:verify_firmware 1
+../Core/Src/main.c:110:6:process_can_message 8
../Core/Src/main.c:159:6:jump_to_app 2
-../Core/Src/main.c:175:6:is_app_valid 10
-../Core/Src/main.c:199:5:main 8
-../Core/Src/main.c:295:6:SystemClock_Config 4
-../Core/Src/main.c:349:13:MX_NVIC_Init 1
-../Core/Src/main.c:368:6:HAL_TIM_PeriodElapsedCallback 2
-../Core/Src/main.c:385:6:Error_Handler 1
+../Core/Src/main.c:188:6:is_app_valid 10
+../Core/Src/main.c:212:5:main 9
+../Core/Src/main.c:336:6:SystemClock_Config 4
+../Core/Src/main.c:390:13:MX_NVIC_Init 1
+../Core/Src/main.c:409:6:HAL_TIM_PeriodElapsedCallback 2
+../Core/Src/main.c:426:6:Error_Handler 1
diff --git a/controller/fw/bootloader/Debug/Core/Src/main.d b/controller/fw/bootloader/Debug/Core/Src/main.d
index f331fcb..0a40c96 100644
--- a/controller/fw/bootloader/Debug/Core/Src/main.d
+++ b/controller/fw/bootloader/Debug/Core/Src/main.d
@@ -1,4 +1,9 @@
-Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/flash.h \
+Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f446xx.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
@@ -6,12 +11,6 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/flash.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
- ../Core/Inc/main.h ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
- ../Core/Inc/stm32f4xx_hal_conf.h \
- ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
- ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
- ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
- ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f446xx.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
@@ -33,16 +32,11 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/flash.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
- ../Core/Inc/adc.h ../Core/Inc/can.h ../Core/Inc/spi.h ../Core/Inc/tim.h \
- ../Core/Inc/usart.h ../Core/Inc/gpio.h ../Core/Inc/can_reg.h
-../Core/Inc/flash.h:
-../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f446xx.h:
-../Drivers/CMSIS/Include/core_cm4.h:
-../Drivers/CMSIS/Include/cmsis_version.h:
-../Drivers/CMSIS/Include/cmsis_compiler.h:
-../Drivers/CMSIS/Include/cmsis_gcc.h:
-../Drivers/CMSIS/Include/mpu_armv7.h:
-../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+ ../Core/Inc/adc.h ../Core/Inc/main.h ../Core/Inc/can.h ../Core/Inc/spi.h \
+ ../Core/Inc/tim.h ../Core/Inc/usart.h ../Core/Inc/gpio.h \
+ ../Core/Inc/flash.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f446xx.h \
+ ../Core/Inc/can_reg.h
../Core/Inc/main.h:
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
../Core/Inc/stm32f4xx_hal_conf.h:
@@ -50,6 +44,12 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/flash.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f446xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
@@ -72,9 +72,12 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/flash.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
../Core/Inc/adc.h:
+../Core/Inc/main.h:
../Core/Inc/can.h:
../Core/Inc/spi.h:
../Core/Inc/tim.h:
../Core/Inc/usart.h:
../Core/Inc/gpio.h:
+../Core/Inc/flash.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f446xx.h:
../Core/Inc/can_reg.h:
diff --git a/controller/fw/bootloader/Debug/Core/Src/main.o b/controller/fw/bootloader/Debug/Core/Src/main.o
index 3b2d386..fdb6990 100644
Binary files a/controller/fw/bootloader/Debug/Core/Src/main.o and b/controller/fw/bootloader/Debug/Core/Src/main.o differ
diff --git a/controller/fw/bootloader/Debug/Core/Src/main.su b/controller/fw/bootloader/Debug/Core/Src/main.su
index c8008e4..e43271a 100644
--- a/controller/fw/bootloader/Debug/Core/Src/main.su
+++ b/controller/fw/bootloader/Debug/Core/Src/main.su
@@ -1,11 +1,11 @@
../Drivers/CMSIS/Include/core_cm4.h:1938:34:__NVIC_SystemReset 4 static,ignoring_inline_asm
-../Core/Src/main.c:78:6:send_ack 56 static
-../Core/Src/main.c:102:6:verify_firmware 16 static
-../Core/Src/main.c:109:6:process_can_message 24 static
-../Core/Src/main.c:159:6:jump_to_app 24 static,ignoring_inline_asm
-../Core/Src/main.c:175:6:is_app_valid 16 static
-../Core/Src/main.c:199:5:main 56 static
-../Core/Src/main.c:295:6:SystemClock_Config 88 static
-../Core/Src/main.c:349:13:MX_NVIC_Init 8 static
-../Core/Src/main.c:368:6:HAL_TIM_PeriodElapsedCallback 16 static
-../Core/Src/main.c:385:6:Error_Handler 4 static,ignoring_inline_asm
+../Core/Src/main.c:79:6:send_ack 56 static
+../Core/Src/main.c:103:6:verify_firmware 16 static
+../Core/Src/main.c:110:6:process_can_message 24 static
+../Core/Src/main.c:159:6:jump_to_app 32 static,ignoring_inline_asm
+../Core/Src/main.c:188:6:is_app_valid 16 static
+../Core/Src/main.c:212:5:main 104 static
+../Core/Src/main.c:336:6:SystemClock_Config 88 static
+../Core/Src/main.c:390:13:MX_NVIC_Init 8 static
+../Core/Src/main.c:409:6:HAL_TIM_PeriodElapsedCallback 16 static
+../Core/Src/main.c:426:6:Error_Handler 4 static,ignoring_inline_asm
diff --git a/controller/fw/bootloader/Debug/Core/Src/spi.o b/controller/fw/bootloader/Debug/Core/Src/spi.o
index 7580d17..902308d 100644
Binary files a/controller/fw/bootloader/Debug/Core/Src/spi.o and b/controller/fw/bootloader/Debug/Core/Src/spi.o differ
diff --git a/controller/fw/bootloader/Debug/Core/Src/stm32f4xx_hal_msp.o b/controller/fw/bootloader/Debug/Core/Src/stm32f4xx_hal_msp.o
index 5e8bbe2..8e02376 100644
Binary files a/controller/fw/bootloader/Debug/Core/Src/stm32f4xx_hal_msp.o and b/controller/fw/bootloader/Debug/Core/Src/stm32f4xx_hal_msp.o differ
diff --git a/controller/fw/bootloader/Debug/Core/Src/stm32f4xx_hal_timebase_tim.o b/controller/fw/bootloader/Debug/Core/Src/stm32f4xx_hal_timebase_tim.o
index 510f1c8..ea2ba9a 100644
Binary files a/controller/fw/bootloader/Debug/Core/Src/stm32f4xx_hal_timebase_tim.o and b/controller/fw/bootloader/Debug/Core/Src/stm32f4xx_hal_timebase_tim.o differ
diff --git a/controller/fw/bootloader/Debug/Core/Src/stm32f4xx_it.o b/controller/fw/bootloader/Debug/Core/Src/stm32f4xx_it.o
index 369b59b..976e138 100644
Binary files a/controller/fw/bootloader/Debug/Core/Src/stm32f4xx_it.o and b/controller/fw/bootloader/Debug/Core/Src/stm32f4xx_it.o differ
diff --git a/controller/fw/bootloader/Debug/Core/Src/syscalls.o b/controller/fw/bootloader/Debug/Core/Src/syscalls.o
index f984cd4..729c904 100644
Binary files a/controller/fw/bootloader/Debug/Core/Src/syscalls.o and b/controller/fw/bootloader/Debug/Core/Src/syscalls.o differ
diff --git a/controller/fw/bootloader/Debug/Core/Src/sysmem.o b/controller/fw/bootloader/Debug/Core/Src/sysmem.o
index 6c6ec35..8dcac25 100644
Binary files a/controller/fw/bootloader/Debug/Core/Src/sysmem.o and b/controller/fw/bootloader/Debug/Core/Src/sysmem.o differ
diff --git a/controller/fw/bootloader/Debug/Core/Src/system_stm32f4xx.o b/controller/fw/bootloader/Debug/Core/Src/system_stm32f4xx.o
index 74eddec..275475a 100644
Binary files a/controller/fw/bootloader/Debug/Core/Src/system_stm32f4xx.o and b/controller/fw/bootloader/Debug/Core/Src/system_stm32f4xx.o differ
diff --git a/controller/fw/bootloader/Debug/Core/Src/tim.o b/controller/fw/bootloader/Debug/Core/Src/tim.o
index e67f329..ff517f0 100644
Binary files a/controller/fw/bootloader/Debug/Core/Src/tim.o and b/controller/fw/bootloader/Debug/Core/Src/tim.o differ
diff --git a/controller/fw/bootloader/Debug/Core/Src/usart.o b/controller/fw/bootloader/Debug/Core/Src/usart.o
index 60110de..8f1d80b 100644
Binary files a/controller/fw/bootloader/Debug/Core/Src/usart.o and b/controller/fw/bootloader/Debug/Core/Src/usart.o differ
diff --git a/controller/fw/bootloader/Debug/Core/Startup/startup_stm32f446retx.o b/controller/fw/bootloader/Debug/Core/Startup/startup_stm32f446retx.o
index a902476..9922ea9 100644
Binary files a/controller/fw/bootloader/Debug/Core/Startup/startup_stm32f446retx.o and b/controller/fw/bootloader/Debug/Core/Startup/startup_stm32f446retx.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
index 2ff5f9f..c904d58 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.o
index 82e6225..dcc27f4 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.o
index 7bb5a01..afac3e3 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.o
index 793635f..a64249a 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
index 8df7743..72e5457 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o
index 3e29b06..4af7bb7 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o
index a1c67d2..5b46922 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o
index dd583d1..ec7af5f 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o
index 2a191ab..1d62a97 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o
index af451fb..d5c465f 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o
index 80f5423..e12dc56 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
index 42a0e78..cd99e8c 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o
index e1d797f..7e59a82 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o
index ec1f443..032ab05 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
index fc39822..5d1c672 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o
index 3898e3e..adbbcc7 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o
index 3b8c012..d6dd794 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
index 96210b8..98bba0d 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
index 76e5352..1d2d182 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o
index 727b9d4..f750082 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o differ
diff --git a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_adc.o b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_adc.o
index efc477e..1b849f9 100644
Binary files a/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_adc.o and b/controller/fw/bootloader/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_adc.o differ
diff --git a/controller/fw/bootloader/Debug/bootloader_.elf b/controller/fw/bootloader/Debug/bootloader_.elf
index 5e7efa4..580b443 100644
Binary files a/controller/fw/bootloader/Debug/bootloader_.elf and b/controller/fw/bootloader/Debug/bootloader_.elf differ
diff --git a/controller/fw/bootloader/Debug/bootloader_.list b/controller/fw/bootloader/Debug/bootloader_.list
index b1652d0..30efb2d 100644
--- a/controller/fw/bootloader/Debug/bootloader_.list
+++ b/controller/fw/bootloader/Debug/bootloader_.list
@@ -5,47 +5,47 @@ Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 000001c4 08000000 08000000 00001000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 1 .text 00005880 080001c4 080001c4 000011c4 2**2
+ 1 .text 00005d20 080001c4 080001c4 000011c4 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
- 2 .rodata 00000018 08005a44 08005a44 00006a44 2**2
+ 2 .rodata 00000040 08005ee4 08005ee4 00006ee4 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 3 .ARM.extab 00000000 08005a5c 08005a5c 00007014 2**0
+ 3 .ARM.extab 00000000 08005f24 08005f24 00007014 2**0
CONTENTS
- 4 .ARM 00000008 08005a5c 08005a5c 00006a5c 2**2
+ 4 .ARM 00000008 08005f24 08005f24 00006f24 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 5 .preinit_array 00000000 08005a64 08005a64 00007014 2**0
+ 5 .preinit_array 00000000 08005f2c 08005f2c 00007014 2**0
CONTENTS, ALLOC, LOAD, DATA
- 6 .init_array 00000004 08005a64 08005a64 00006a64 2**2
+ 6 .init_array 00000004 08005f2c 08005f2c 00006f2c 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 7 .fini_array 00000004 08005a68 08005a68 00006a68 2**2
+ 7 .fini_array 00000004 08005f30 08005f30 00006f30 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 8 .data 00000014 20000000 08005a6c 00007000 2**2
+ 8 .data 00000014 20000000 08005f34 00007000 2**2
CONTENTS, ALLOC, LOAD, DATA
- 9 .bss 000002b8 20000014 08005a80 00007014 2**2
+ 9 .bss 000002b4 20000014 08005f48 00007014 2**2
ALLOC
- 10 ._user_heap_stack 00000604 200002cc 08005a80 000072cc 2**0
+ 10 ._user_heap_stack 00000600 200002c8 08005f48 000072c8 2**0
ALLOC
11 .ARM.attributes 00000030 00000000 00000000 00007014 2**0
CONTENTS, READONLY
- 12 .debug_info 00017a70 00000000 00000000 00007044 2**0
+ 12 .debug_info 00017b68 00000000 00000000 00007044 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 13 .debug_abbrev 00003f43 00000000 00000000 0001eab4 2**0
+ 13 .debug_abbrev 00003f50 00000000 00000000 0001ebac 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 14 .debug_aranges 000014c0 00000000 00000000 000229f8 2**3
+ 14 .debug_aranges 000014c0 00000000 00000000 00022b00 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
- 15 .debug_rnglists 0000100e 00000000 00000000 00023eb8 2**0
+ 15 .debug_rnglists 0000100e 00000000 00000000 00023fc0 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 16 .debug_macro 00025b05 00000000 00000000 00024ec6 2**0
+ 16 .debug_macro 00025b09 00000000 00000000 00024fce 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 17 .debug_line 0001b6d6 00000000 00000000 0004a9cb 2**0
+ 17 .debug_line 0001b718 00000000 00000000 0004aad7 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 18 .debug_str 000e2d70 00000000 00000000 000660a1 2**0
+ 18 .debug_str 000e2db8 00000000 00000000 000661ef 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 19 .comment 00000043 00000000 00000000 00148e11 2**0
+ 19 .comment 00000043 00000000 00000000 00148fa7 2**0
CONTENTS, READONLY
- 20 .debug_frame 000055c8 00000000 00000000 00148e54 2**2
+ 20 .debug_frame 000055c8 00000000 00000000 00148fec 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
- 21 .debug_line_str 00000050 00000000 00000000 0014e41c 2**0
+ 21 .debug_line_str 0000006b 00000000 00000000 0014e5b4 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
@@ -64,7 +64,7 @@ Disassembly of section .text:
80001da: bd10 pop {r4, pc}
80001dc: 20000014 .word 0x20000014
80001e0: 00000000 .word 0x00000000
- 80001e4: 08005a2c .word 0x08005a2c
+ 80001e4: 08005ecc .word 0x08005ecc
080001e8 :
80001e8: b508 push {r3, lr}
@@ -76,7 +76,7 @@ Disassembly of section .text:
80001f6: bd08 pop {r3, pc}
80001f8: 00000000 .word 0x00000000
80001fc: 20000018 .word 0x20000018
- 8000200: 08005a2c .word 0x08005a2c
+ 8000200: 08005ecc .word 0x08005ecc
08000204 <__aeabi_uldivmod>:
8000204: b953 cbnz r3, 800021c <__aeabi_uldivmod+0x18>
@@ -421,13 +421,13 @@ void MX_ADC2_Init(void)
8000552: 615a str r2, [r3, #20]
if (HAL_ADC_Init(&hadc2) != HAL_OK)
8000554: 481b ldr r0, [pc, #108] @ (80005c4 )
- 8000556: f001 fba9 bl 8001cac
+ 8000556: f001 fc05 bl 8001d64
800055a: 4603 mov r3, r0
800055c: 2b00 cmp r3, #0
800055e: d001 beq.n 8000564
{
Error_Handler();
- 8000560: f000 ff05 bl 800136e
+ 8000560: f000 ff2b bl 80013ba
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
@@ -445,13 +445,13 @@ void MX_ADC2_Init(void)
8000570: 463b mov r3, r7
8000572: 4619 mov r1, r3
8000574: 4813 ldr r0, [pc, #76] @ (80005c4 )
- 8000576: f001 fd0b bl 8001f90
+ 8000576: f001 fd67 bl 8002048
800057a: 4603 mov r3, r0
800057c: 2b00 cmp r3, #0
800057e: d001 beq.n 8000584
{
Error_Handler();
- 8000580: f000 fef5 bl 800136e
+ 8000580: f000 ff1b bl 80013ba
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
@@ -466,13 +466,13 @@ void MX_ADC2_Init(void)
800058c: 463b mov r3, r7
800058e: 4619 mov r1, r3
8000590: 480c ldr r0, [pc, #48] @ (80005c4 )
- 8000592: f001 fcfd bl 8001f90
+ 8000592: f001 fd59 bl 8002048
8000596: 4603 mov r3, r0
8000598: 2b00 cmp r3, #0
800059a: d001 beq.n 80005a0
{
Error_Handler();
- 800059c: f000 fee7 bl 800136e
+ 800059c: f000 ff0d bl 80013ba
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
@@ -487,13 +487,13 @@ void MX_ADC2_Init(void)
80005a8: 463b mov r3, r7
80005aa: 4619 mov r1, r3
80005ac: 4805 ldr r0, [pc, #20] @ (80005c4 )
- 80005ae: f001 fcef bl 8001f90
+ 80005ae: f001 fd4b bl 8002048
80005b2: 4603 mov r3, r0
80005b4: 2b00 cmp r3, #0
80005b6: d001 beq.n 80005bc
{
Error_Handler();
- 80005b8: f000 fed9 bl 800136e
+ 80005b8: f000 feff bl 80013ba
}
/* USER CODE BEGIN ADC2_Init 2 */
@@ -594,7 +594,7 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
8000652: f107 0314 add.w r3, r7, #20
8000656: 4619 mov r1, r3
8000658: 480b ldr r0, [pc, #44] @ (8000688 )
- 800065a: f002 fda1 bl 80031a0
+ 800065a: f002 fef9 bl 8003450
GPIO_InitStruct.Pin = SENSE2_Pin|SENSE1_Pin;
800065e: 2303 movs r3, #3
@@ -609,7 +609,7 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
800066a: f107 0314 add.w r3, r7, #20
800066e: 4619 mov r1, r3
8000670: 4806 ldr r0, [pc, #24] @ (800068c )
- 8000672: f002 fd95 bl 80031a0
+ 8000672: f002 feed bl 8003450
/* USER CODE BEGIN ADC2_MspInit 1 */
@@ -668,9 +668,9 @@ void MX_CAN2_Init(void)
80006bc: 4b0d ldr r3, [pc, #52] @ (80006f4 )
80006be: 2200 movs r2, #0
80006c0: 761a strb r2, [r3, #24]
- hcan2.Init.AutoBusOff = DISABLE;
+ hcan2.Init.AutoBusOff = ENABLE;
80006c2: 4b0c ldr r3, [pc, #48] @ (80006f4 )
- 80006c4: 2200 movs r2, #0
+ 80006c4: 2201 movs r2, #1
80006c6: 765a strb r2, [r3, #25]
hcan2.Init.AutoWakeUp = DISABLE;
80006c8: 4b0a ldr r3, [pc, #40] @ (80006f4 )
@@ -690,13 +690,13 @@ void MX_CAN2_Init(void)
80006de: 775a strb r2, [r3, #29]
if (HAL_CAN_Init(&hcan2) != HAL_OK)
80006e0: 4804 ldr r0, [pc, #16] @ (80006f4 )
- 80006e2: f001 fe8d bl 8002400
+ 80006e2: f001 fee9 bl 80024b8
80006e6: 4603 mov r3, r0
80006e8: 2b00 cmp r3, #0
80006ea: d001 beq.n 80006f0
{
Error_Handler();
- 80006ec: f000 fe3f bl 800136e
+ 80006ec: f000 fe65 bl 80013ba
}
/* USER CODE BEGIN CAN2_Init 2 */
@@ -799,7 +799,7 @@ void HAL_CAN_MspInit(CAN_HandleTypeDef* canHandle)
8000788: f107 0314 add.w r3, r7, #20
800078c: 4619 mov r1, r3
800078e: 4805 ldr r0, [pc, #20] @ (80007a4 )
- 8000790: f002 fd06 bl 80031a0
+ 8000790: f002 fe5e bl 8003450
/* USER CODE BEGIN CAN2_MspInit 1 */
@@ -1263,7 +1263,7 @@ void compact_page(){
8000a36: 2228 movs r2, #40 @ 0x28
8000a38: 2100 movs r1, #0
8000a3a: 4618 mov r0, r3
- 8000a3c: f004 ffbc bl 80059b8
+ 8000a3c: f005 fa0c bl 8005e58
for(int i = (uint32_t)SECTOR_6;i < (uint32_t)SECTOR_6_END;i += FLASH_RECORD_SIZE) {
8000a40: 4b2c ldr r3, [pc, #176] @ (8000af4 )
8000a42: 63fb str r3, [r7, #60] @ 0x3c
@@ -1501,7 +1501,7 @@ void write_param(uint8_t param_id, uint32_t val) {
8000bc0: 4622 mov r2, r4
8000bc2: 462b mov r3, r5
8000bc4: 2002 movs r0, #2
- 8000bc6: f002 f835 bl 8002c34
+ 8000bc6: f002 f98d bl 8002ee4
for (uint16_t i = 0; i < len; i += 4) {
8000bca: 89fb ldrh r3, [r7, #14]
8000bcc: 3304 adds r3, #4
@@ -1557,7 +1557,7 @@ void erase_flash_pages() {
8000c10: 1d3b adds r3, r7, #4
8000c12: 4611 mov r1, r2
8000c14: 4618 mov r0, r3
- 8000c16: f002 f9a1 bl 8002f5c
+ 8000c16: f002 faf9 bl 800320c
flash_lock();
8000c1a: f7ff fddd bl 80007d8
}
@@ -1738,14 +1738,14 @@ void MX_GPIO_Init(void)
8000d2e: 2201 movs r2, #1
8000d30: f44f 4100 mov.w r1, #32768 @ 0x8000
8000d34: 4837 ldr r0, [pc, #220] @ (8000e14 )
- 8000d36: f002 fbc7 bl 80034c8
+ 8000d36: f002 fd1f bl 8003778
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOC, EN_W_Pin|DRV_RESET_Pin|DRV_SLEEP_Pin|LED1_Pin
8000d3a: 2200 movs r2, #0
8000d3c: f44f 51fa mov.w r1, #8000 @ 0x1f40
8000d40: 4835 ldr r0, [pc, #212] @ (8000e18 )
- 8000d42: f002 fbc1 bl 80034c8
+ 8000d42: f002 fd19 bl 8003778
|LED2_Pin|LED3_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
@@ -1753,14 +1753,14 @@ void MX_GPIO_Init(void)
8000d46: 2200 movs r2, #0
8000d48: f44f 51c0 mov.w r1, #6144 @ 0x1800
8000d4c: 4833 ldr r0, [pc, #204] @ (8000e1c )
- 8000d4e: f002 fbbb bl 80034c8
+ 8000d4e: f002 fd13 bl 8003778
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(spi1_cs_GPIO_Port, spi1_cs_Pin, GPIO_PIN_RESET);
8000d52: 2200 movs r2, #0
8000d54: 2104 movs r1, #4
8000d56: 4832 ldr r0, [pc, #200] @ (8000e20 )
- 8000d58: f002 fbb6 bl 80034c8
+ 8000d58: f002 fd0e bl 8003778
/*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = AS5045_CS_Pin;
@@ -1779,7 +1779,7 @@ void MX_GPIO_Init(void)
8000d6e: f107 0314 add.w r3, r7, #20
8000d72: 4619 mov r1, r3
8000d74: 4827 ldr r0, [pc, #156] @ (8000e14 )
- 8000d76: f002 fa13 bl 80031a0
+ 8000d76: f002 fb6b bl 8003450
/*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = EN_W_Pin;
@@ -1798,7 +1798,7 @@ void MX_GPIO_Init(void)
8000d8a: f107 0314 add.w r3, r7, #20
8000d8e: 4619 mov r1, r3
8000d90: 4821 ldr r0, [pc, #132] @ (8000e18 )
- 8000d92: f002 fa05 bl 80031a0
+ 8000d92: f002 fb5d bl 8003450
/*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = DRV_FAULT_Pin;
@@ -1814,7 +1814,7 @@ void MX_GPIO_Init(void)
8000da2: f107 0314 add.w r3, r7, #20
8000da6: 4619 mov r1, r3
8000da8: 481b ldr r0, [pc, #108] @ (8000e18 )
- 8000daa: f002 f9f9 bl 80031a0
+ 8000daa: f002 fb51 bl 8003450
/*Configure GPIO pins : PCPin PCPin PCPin PCPin
PCPin */
@@ -1835,7 +1835,7 @@ void MX_GPIO_Init(void)
8000dc0: f107 0314 add.w r3, r7, #20
8000dc4: 4619 mov r1, r3
8000dc6: 4814 ldr r0, [pc, #80] @ (8000e18 )
- 8000dc8: f002 f9ea bl 80031a0
+ 8000dc8: f002 fb42 bl 8003450
/*Configure GPIO pins : PAPin PAPin */
GPIO_InitStruct.Pin = EN_U_Pin|EN_V_Pin;
@@ -1854,7 +1854,7 @@ void MX_GPIO_Init(void)
8000dde: f107 0314 add.w r3, r7, #20
8000de2: 4619 mov r1, r3
8000de4: 480d ldr r0, [pc, #52] @ (8000e1c )
- 8000de6: f002 f9db bl 80031a0
+ 8000de6: f002 fb33 bl 8003450
/*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = spi1_cs_Pin;
@@ -1873,7 +1873,7 @@ void MX_GPIO_Init(void)
8000dfa: f107 0314 add.w r3, r7, #20
8000dfe: 4619 mov r1, r3
8000e00: 4807 ldr r0, [pc, #28] @ (8000e20 )
- 8000e02: f002 f9cd bl 80031a0
+ 8000e02: f002 fb25 bl 8003450
}
8000e06: bf00 nop
@@ -1945,9 +1945,9 @@ void send_ack(uint8_t status) {
8000e5c: 743b strb r3, [r7, #16]
uint32_t tx_mailbox;
- tx_header.ExtId = ACK_CAN_ID; // id = 0x05
+ tx_header.StdId = ACK_CAN_ID; // id = 0x05
8000e5e: 2305 movs r3, #5
- 8000e60: 61bb str r3, [r7, #24]
+ 8000e60: 617b str r3, [r7, #20]
tx_header.IDE = CAN_ID_STD; //standart id
8000e62: 2300 movs r3, #0
8000e64: 61fb str r3, [r7, #28]
@@ -1967,7 +1967,7 @@ void send_ack(uint8_t status) {
8000e78: f107 0210 add.w r2, r7, #16
8000e7c: f107 0114 add.w r1, r7, #20
8000e80: 4804 ldr r0, [pc, #16] @ (8000e94 )
- 8000e82: f001 fbb8 bl 80025f6
+ 8000e82: f001 fd39 bl 80028f8
8000e86: 4603 mov r3, r0
8000e88: f887 302f strb.w r3, [r7, #47] @ 0x2f
if(result != HAL_OK) {
@@ -2029,12889 +2029,13773 @@ void process_can_message(CAN_RxHeaderTypeDef *header, uint8_t *data) {
8000edc: af00 add r7, sp, #0
8000ede: 6078 str r0, [r7, #4]
8000ee0: 6039 str r1, [r7, #0]
- msg_id = header->ExtId;
+ msg_id = header->StdId;
8000ee2: 687b ldr r3, [r7, #4]
- 8000ee4: 685b ldr r3, [r3, #4]
- 8000ee6: 4a41 ldr r2, [pc, #260] @ (8000fec )
+ 8000ee4: 681b ldr r3, [r3, #0]
+ 8000ee6: 4a42 ldr r2, [pc, #264] @ (8000ff0 )
8000ee8: 6013 str r3, [r2, #0]
/* 0x697
69 - slave addr
7 || 8 - REG_READ or REG_WRITE */
- id_x = (msg_id >> 4) & 0xFFFF; // get addr
- 8000eea: 4b40 ldr r3, [pc, #256] @ (8000fec )
+ id_x = (msg_id >> 4) & 0xFFF; // get addr
+ 8000eea: 4b41 ldr r3, [pc, #260] @ (8000ff0 )
8000eec: 681b ldr r3, [r3, #0]
8000eee: 091b lsrs r3, r3, #4
- 8000ef0: b29a uxth r2, r3
- 8000ef2: 4b3f ldr r3, [pc, #252] @ (8000ff0 )
- 8000ef4: 801a strh r2, [r3, #0]
+ 8000ef0: b29b uxth r3, r3
+ 8000ef2: f3c3 030b ubfx r3, r3, #0, #12
+ 8000ef6: b29a uxth r2, r3
+ 8000ef8: 4b3e ldr r3, [pc, #248] @ (8000ff4 )
+ 8000efa: 801a strh r2, [r3, #0]
msg_ch = msg_id & 0xF; // check cmd
- 8000ef6: 4b3d ldr r3, [pc, #244] @ (8000fec )
- 8000ef8: 681b ldr r3, [r3, #0]
- 8000efa: b2db uxtb r3, r3
- 8000efc: f003 030f and.w r3, r3, #15
- 8000f00: b2da uxtb r2, r3
- 8000f02: 4b3c ldr r3, [pc, #240] @ (8000ff4 )
- 8000f04: 701a strb r2, [r3, #0]
+ 8000efc: 4b3c ldr r3, [pc, #240] @ (8000ff0 )
+ 8000efe: 681b ldr r3, [r3, #0]
+ 8000f00: b2db uxtb r3, r3
+ 8000f02: f003 030f and.w r3, r3, #15
+ 8000f06: b2da uxtb r2, r3
+ 8000f08: 4b3b ldr r3, [pc, #236] @ (8000ff8 )
+ 8000f0a: 701a strb r2, [r3, #0]
// Check addr
if(id_x == flash_record[addr_id].value) {
- 8000f06: 4b3a ldr r3, [pc, #232] @ (8000ff0 )
- 8000f08: 881b ldrh r3, [r3, #0]
- 8000f0a: b29b uxth r3, r3
- 8000f0c: 461a mov r2, r3
- 8000f0e: 4b3a ldr r3, [pc, #232] @ (8000ff8 )
- 8000f10: 681b ldr r3, [r3, #0]
- 8000f12: 685b ldr r3, [r3, #4]
- 8000f14: 429a cmp r2, r3
- 8000f16: d164 bne.n 8000fe2
+ 8000f0c: 4b39 ldr r3, [pc, #228] @ (8000ff4 )
+ 8000f0e: 881b ldrh r3, [r3, #0]
+ 8000f10: b29b uxth r3, r3
+ 8000f12: 461a mov r2, r3
+ 8000f14: 4b39 ldr r3, [pc, #228] @ (8000ffc )
+ 8000f16: 681b ldr r3, [r3, #0]
+ 8000f18: 685b ldr r3, [r3, #4]
+ 8000f1a: 429a cmp r2, r3
+ 8000f1c: d164 bne.n 8000fe8
switch(msg_ch) {
- 8000f18: 4b36 ldr r3, [pc, #216] @ (8000ff4 )
- 8000f1a: 781b ldrb r3, [r3, #0]
- 8000f1c: b2db uxtb r3, r3
- 8000f1e: 2b03 cmp r3, #3
- 8000f20: d01b beq.n 8000f5a
- 8000f22: 2b03 cmp r3, #3
- 8000f24: dc5d bgt.n 8000fe2
- 8000f26: 2b01 cmp r3, #1
- 8000f28: d002 beq.n 8000f30
- 8000f2a: 2b02 cmp r3, #2
- 8000f2c: d03b beq.n 8000fa6
+ 8000f1e: 4b36 ldr r3, [pc, #216] @ (8000ff8 )
+ 8000f20: 781b ldrb r3, [r3, #0]
+ 8000f22: b2db uxtb r3, r3
+ 8000f24: 2b03 cmp r3, #3
+ 8000f26: d01b beq.n 8000f60
+ 8000f28: 2b03 cmp r3, #3
+ 8000f2a: dc5d bgt.n 8000fe8
+ 8000f2c: 2b01 cmp r3, #1
+ 8000f2e: d002 beq.n 8000f36
+ 8000f30: 2b02 cmp r3, #2
+ 8000f32: d03b beq.n 8000fac
erase_flash_pages(); // Erase error firwmare
}
break;
}
}
}
- 8000f2e: e058 b.n 8000fe2
+ 8000f34: e058 b.n 8000fe8
if(data[0] == 0x01) {
- 8000f30: 683b ldr r3, [r7, #0]
- 8000f32: 781b ldrb r3, [r3, #0]
- 8000f34: 2b01 cmp r3, #1
- 8000f36: d151 bne.n 8000fdc
+ 8000f36: 683b ldr r3, [r7, #0]
+ 8000f38: 781b ldrb r3, [r3, #0]
+ 8000f3a: 2b01 cmp r3, #1
+ 8000f3c: d151 bne.n 8000fe2
fw_size = *((uint32_t*)&data[1]);
- 8000f38: 683b ldr r3, [r7, #0]
- 8000f3a: f8d3 3001 ldr.w r3, [r3, #1]
- 8000f3e: 4a2f ldr r2, [pc, #188] @ (8000ffc )
- 8000f40: 6013 str r3, [r2, #0]
+ 8000f3e: 683b ldr r3, [r7, #0]
+ 8000f40: f8d3 3001 ldr.w r3, [r3, #1]
+ 8000f44: 4a2e ldr r2, [pc, #184] @ (8001000 )
+ 8000f46: 6013 str r3, [r2, #0]
fw_crc = *((uint16_t*)&data[5]);
- 8000f42: 683b ldr r3, [r7, #0]
- 8000f44: f8b3 2005 ldrh.w r2, [r3, #5]
- 8000f48: 4b2d ldr r3, [pc, #180] @ (8001000 )
- 8000f4a: 801a strh r2, [r3, #0]
+ 8000f48: 683b ldr r3, [r7, #0]
+ 8000f4a: f8b3 2005 ldrh.w r2, [r3, #5]
+ 8000f4e: 4b2d ldr r3, [pc, #180] @ (8001004 )
+ 8000f50: 801a strh r2, [r3, #0]
ptr_flash = APP_ADDRESS;
- 8000f4c: 4b2d ldr r3, [pc, #180] @ (8001004 )
- 8000f4e: 4a2e ldr r2, [pc, #184] @ (8001008 )
- 8000f50: 601a str r2, [r3, #0]
+ 8000f52: 4b2d ldr r3, [pc, #180] @ (8001008 )
+ 8000f54: 4a2d ldr r2, [pc, #180] @ (800100c )
+ 8000f56: 601a str r2, [r3, #0]
send_ack(0x01);
- 8000f52: 2001 movs r0, #1
- 8000f54: f7ff ff7c bl 8000e50
+ 8000f58: 2001 movs r0, #1
+ 8000f5a: f7ff ff79 bl 8000e50
break;
- 8000f58: e040 b.n 8000fdc
+ 8000f5e: e040 b.n 8000fe2
if(ptr_flash < (APP_ADDRESS + fw_size)) {
- 8000f5a: 4b28 ldr r3, [pc, #160] @ (8000ffc )
- 8000f5c: 681b ldr r3, [r3, #0]
- 8000f5e: f103 6300 add.w r3, r3, #134217728 @ 0x8000000
- 8000f62: f503 4300 add.w r3, r3, #32768 @ 0x8000
- 8000f66: 4a27 ldr r2, [pc, #156] @ (8001004 )
- 8000f68: 6812 ldr r2, [r2, #0]
- 8000f6a: 4293 cmp r3, r2
- 8000f6c: d938 bls.n 8000fe0
+ 8000f60: 4b27 ldr r3, [pc, #156] @ (8001000 )
+ 8000f62: 681b ldr r3, [r3, #0]
+ 8000f64: f103 6300 add.w r3, r3, #134217728 @ 0x8000000
+ 8000f68: f503 4300 add.w r3, r3, #32768 @ 0x8000
+ 8000f6c: 4a26 ldr r2, [pc, #152] @ (8001008 )
+ 8000f6e: 6812 ldr r2, [r2, #0]
+ 8000f70: 4293 cmp r3, r2
+ 8000f72: d938 bls.n 8000fe6
memcpy(aligned_data, data, header->DLC); //copy from data to aligned_data
- 8000f6e: 687b ldr r3, [r7, #4]
- 8000f70: 691a ldr r2, [r3, #16]
- 8000f72: f107 0308 add.w r3, r7, #8
- 8000f76: 6839 ldr r1, [r7, #0]
- 8000f78: 4618 mov r0, r3
- 8000f7a: f004 fd49 bl 8005a10
+ 8000f74: 687b ldr r3, [r7, #4]
+ 8000f76: 691a ldr r2, [r3, #16]
+ 8000f78: f107 0308 add.w r3, r7, #8
+ 8000f7c: 6839 ldr r1, [r7, #0]
+ 8000f7e: 4618 mov r0, r3
+ 8000f80: f004 ff96 bl 8005eb0
write_flash_page(aligned_data, header->DLC);
- 8000f7e: 687b ldr r3, [r7, #4]
- 8000f80: 691b ldr r3, [r3, #16]
- 8000f82: b29a uxth r2, r3
- 8000f84: f107 0308 add.w r3, r7, #8
- 8000f88: 4611 mov r1, r2
- 8000f8a: 4618 mov r0, r3
- 8000f8c: f7ff fdfe bl 8000b8c
+ 8000f84: 687b ldr r3, [r7, #4]
+ 8000f86: 691b ldr r3, [r3, #16]
+ 8000f88: b29a uxth r2, r3
+ 8000f8a: f107 0308 add.w r3, r7, #8
+ 8000f8e: 4611 mov r1, r2
+ 8000f90: 4618 mov r0, r3
+ 8000f92: f7ff fdfb bl 8000b8c
ptr_flash += header->DLC;
- 8000f90: 687b ldr r3, [r7, #4]
- 8000f92: 691a ldr r2, [r3, #16]
- 8000f94: 4b1b ldr r3, [pc, #108] @ (8001004 )
- 8000f96: 681b ldr r3, [r3, #0]
- 8000f98: 4413 add r3, r2
- 8000f9a: 4a1a ldr r2, [pc, #104] @ (8001004 )
- 8000f9c: 6013 str r3, [r2, #0]
+ 8000f96: 687b ldr r3, [r7, #4]
+ 8000f98: 691a ldr r2, [r3, #16]
+ 8000f9a: 4b1b ldr r3, [pc, #108] @ (8001008 )
+ 8000f9c: 681b ldr r3, [r3, #0]
+ 8000f9e: 4413 add r3, r2
+ 8000fa0: 4a19 ldr r2, [pc, #100] @ (8001008 )
+ 8000fa2: 6013 str r3, [r2, #0]
send_ack(0x02);
- 8000f9e: 2002 movs r0, #2
- 8000fa0: f7ff ff56 bl 8000e50
+ 8000fa4: 2002 movs r0, #2
+ 8000fa6: f7ff ff53 bl 8000e50
break;
- 8000fa4: e01c b.n 8000fe0
+ 8000faa: e01c b.n 8000fe6
if(verify_firmware()) {
- 8000fa6: f7ff ff77 bl 8000e98
- 8000faa: 4603 mov r3, r0
- 8000fac: 2b00 cmp r3, #0
- 8000fae: d00f beq.n 8000fd0
+ 8000fac: f7ff ff74 bl 8000e98
+ 8000fb0: 4603 mov r3, r0
+ 8000fb2: 2b00 cmp r3, #0
+ 8000fb4: d00f beq.n 8000fd6
send_ack(0xAA);
- 8000fb0: 20aa movs r0, #170 @ 0xaa
- 8000fb2: f7ff ff4d bl 8000e50
+ 8000fb6: 20aa movs r0, #170 @ 0xaa
+ 8000fb8: f7ff ff4a bl 8000e50
write_param(firmw, 0); // Reset firmware update
- 8000fb6: 2100 movs r1, #0
- 8000fb8: 2004 movs r0, #4
- 8000fba: f7ff fda1 bl 8000b00
+ 8000fbc: 2100 movs r1, #0
+ 8000fbe: 2004 movs r0, #4
+ 8000fc0: f7ff fd9e bl 8000b00
fw_update = false;
- 8000fbe: 4b13 ldr r3, [pc, #76] @ (800100c )
- 8000fc0: 2200 movs r2, #0
- 8000fc2: 701a strb r2, [r3, #0]
+ 8000fc4: 4b12 ldr r3, [pc, #72] @ (8001010 )
+ 8000fc6: 2200 movs r2, #0
+ 8000fc8: 701a strb r2, [r3, #0]
HAL_Delay(500);
- 8000fc4: f44f 70fa mov.w r0, #500 @ 0x1f4
- 8000fc8: f000 fe4c bl 8001c64
+ 8000fca: f44f 70fa mov.w r0, #500 @ 0x1f4
+ 8000fce: f000 fea5 bl 8001d1c
NVIC_SystemReset();
- 8000fcc: f7ff ff2a bl 8000e24 <__NVIC_SystemReset>
+ 8000fd2: f7ff ff27 bl 8000e24 <__NVIC_SystemReset>
send_ack(0x55); // Error
- 8000fd0: 2055 movs r0, #85 @ 0x55
- 8000fd2: f7ff ff3d bl 8000e50
+ 8000fd6: 2055 movs r0, #85 @ 0x55
+ 8000fd8: f7ff ff3a bl 8000e50
erase_flash_pages(); // Erase error firwmare
- 8000fd6: f7ff fe0d bl 8000bf4
+ 8000fdc: f7ff fe0a bl 8000bf4
break;
- 8000fda: e002 b.n 8000fe2
+ 8000fe0: e002 b.n 8000fe8
break;
- 8000fdc: bf00 nop
- 8000fde: e000 b.n 8000fe2
- break;
- 8000fe0: bf00 nop
-}
8000fe2: bf00 nop
- 8000fe4: 3710 adds r7, #16
- 8000fe6: 46bd mov sp, r7
- 8000fe8: bd80 pop {r7, pc}
- 8000fea: bf00 nop
- 8000fec: 200000e0 .word 0x200000e0
- 8000ff0: 200000e4 .word 0x200000e4
- 8000ff4: 200000e6 .word 0x200000e6
- 8000ff8: 200000d8 .word 0x200000d8
- 8000ffc: 200000cc .word 0x200000cc
- 8001000: 200000d0 .word 0x200000d0
- 8001004: 200000dc .word 0x200000dc
- 8001008: 08008000 .word 0x08008000
- 800100c: 200000c8 .word 0x200000c8
-
-08001010 :
-
-void jump_to_app() {
- 8001010: b580 push {r7, lr}
- 8001012: b084 sub sp, #16
- 8001014: af00 add r7, sp, #0
- __ASM volatile ("cpsid i" : : : "memory");
- 8001016: b672 cpsid i
+ 8000fe4: e000 b.n 8000fe8
+ break;
+ 8000fe6: bf00 nop
}
- 8001018: bf00 nop
+ 8000fe8: bf00 nop
+ 8000fea: 3710 adds r7, #16
+ 8000fec: 46bd mov sp, r7
+ 8000fee: bd80 pop {r7, pc}
+ 8000ff0: 200000dc .word 0x200000dc
+ 8000ff4: 200000e0 .word 0x200000e0
+ 8000ff8: 200000e2 .word 0x200000e2
+ 8000ffc: 200000d4 .word 0x200000d4
+ 8001000: 200000cc .word 0x200000cc
+ 8001004: 200000d0 .word 0x200000d0
+ 8001008: 200000d8 .word 0x200000d8
+ 800100c: 08008000 .word 0x08008000
+ 8001010: 200000c8 .word 0x200000c8
+
+08001014 :
+
+void jump_to_app(void) {
+ 8001014: b580 push {r7, lr}
+ 8001016: b086 sub sp, #24
+ 8001018: af00 add r7, sp, #0
+ HAL_RCC_DeInit();
+ 800101a: f002 ff93 bl 8003f44
+ HAL_DeInit();
+ 800101e: f000 fe27 bl 8001c70
+ __ASM volatile ("cpsid i" : : : "memory");
+ 8001022: b672 cpsid i
+}
+ 8001024: bf00 nop
__disable_irq();
- jump = *(volatile uint32_t*)(APP_ADDRESS + 4);
- 800101a: 4b12 ldr r3, [pc, #72] @ (8001064 )
- 800101c: 681b ldr r3, [r3, #0]
- 800101e: 4a12 ldr r2, [pc, #72] @ (8001068 )
- 8001020: 6013 str r3, [r2, #0]
- void (*app_entry)(void);
- app_entry = (void (*)(void))jump;
- 8001022: 4b11 ldr r3, [pc, #68] @ (8001068 )
- 8001024: 681b ldr r3, [r3, #0]
- 8001026: 60bb str r3, [r7, #8]
+
+ uint32_t *app_vector_table = (uint32_t*)APP_ADDRESS;
+ 8001026: 4b14 ldr r3, [pc, #80] @ (8001078 )
+ 8001028: 613b str r3, [r7, #16]
- for (uint32_t i = 0; i < 8; i++) {
- 8001028: 2300 movs r3, #0
- 800102a: 60fb str r3, [r7, #12]
- 800102c: e009 b.n 8001042
+ // RESET ALL Interrupt
+ for (uint8_t i = 0; i < 8; i++) {
+ 800102a: 2300 movs r3, #0
+ 800102c: 75fb strb r3, [r7, #23]
+ 800102e: e010 b.n 8001052
+ NVIC->ICER[i] = 0xFFFFFFFF;
+ 8001030: 4a12 ldr r2, [pc, #72] @ (800107c )
+ 8001032: 7dfb ldrb r3, [r7, #23]
+ 8001034: 3320 adds r3, #32
+ 8001036: f04f 31ff mov.w r1, #4294967295
+ 800103a: f842 1023 str.w r1, [r2, r3, lsl #2]
NVIC->ICPR[i] = 0xFFFFFFFF;
- 800102e: 4a0f ldr r2, [pc, #60] @ (800106c )
- 8001030: 68fb ldr r3, [r7, #12]
- 8001032: 3360 adds r3, #96 @ 0x60
- 8001034: f04f 31ff mov.w r1, #4294967295
- 8001038: f842 1023 str.w r1, [r2, r3, lsl #2]
- for (uint32_t i = 0; i < 8; i++) {
- 800103c: 68fb ldr r3, [r7, #12]
- 800103e: 3301 adds r3, #1
- 8001040: 60fb str r3, [r7, #12]
- 8001042: 68fb ldr r3, [r7, #12]
- 8001044: 2b07 cmp r3, #7
- 8001046: d9f2 bls.n 800102e
+ 800103e: 4a0f ldr r2, [pc, #60] @ (800107c )
+ 8001040: 7dfb ldrb r3, [r7, #23]
+ 8001042: 3360 adds r3, #96 @ 0x60
+ 8001044: f04f 31ff mov.w r1, #4294967295
+ 8001048: f842 1023 str.w r1, [r2, r3, lsl #2]
+ for (uint8_t i = 0; i < 8; i++) {
+ 800104c: 7dfb ldrb r3, [r7, #23]
+ 800104e: 3301 adds r3, #1
+ 8001050: 75fb strb r3, [r7, #23]
+ 8001052: 7dfb ldrb r3, [r7, #23]
+ 8001054: 2b07 cmp r3, #7
+ 8001056: d9eb bls.n 8001030
}
- __set_MSP(*(volatile uint32_t*)APP_ADDRESS);
- 8001048: 4b09 ldr r3, [pc, #36] @ (8001070 )
- 800104a: 681b ldr r3, [r3, #0]
- 800104c: 607b str r3, [r7, #4]
+ // APP_ADDR
+ __set_MSP(app_vector_table[0]);
+ 8001058: 693b ldr r3, [r7, #16]
+ 800105a: 681b ldr r3, [r3, #0]
+ 800105c: 607b str r3, [r7, #4]
\details Assigns the given value to the Main Stack Pointer (MSP).
\param [in] topOfMainStack Main Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
{
__ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
- 800104e: 687b ldr r3, [r7, #4]
- 8001050: f383 8808 msr MSP, r3
+ 800105e: 687b ldr r3, [r7, #4]
+ 8001060: f383 8808 msr MSP, r3
}
- 8001054: bf00 nop
- // SCB->VTOR = (uint32_t)0x08008004;
- app_entry();
- 8001056: 68bb ldr r3, [r7, #8]
- 8001058: 4798 blx r3
-}
- 800105a: bf00 nop
- 800105c: 3710 adds r7, #16
- 800105e: 46bd mov sp, r7
- 8001060: bd80 pop {r7, pc}
- 8001062: bf00 nop
- 8001064: 08008004 .word 0x08008004
- 8001068: 200000d4 .word 0x200000d4
- 800106c: e000e100 .word 0xe000e100
- 8001070: 08008000 .word 0x08008000
+ 8001064: bf00 nop
-08001074 :
+ // Point to go
+ uint32_t app_entry = *(app_vector_table + 1); //APP_ADDR + 4
+ 8001066: 693b ldr r3, [r7, #16]
+ 8001068: 685b ldr r3, [r3, #4]
+ 800106a: 60fb str r3, [r7, #12]
+ void (*application)(void);
+ application = (void (*)(void))app_entry;
+ 800106c: 68fb ldr r3, [r7, #12]
+ 800106e: 60bb str r3, [r7, #8]
+
+ // Go to application
+ application();
+ 8001070: 68bb ldr r3, [r7, #8]
+ 8001072: 4798 blx r3
+
+ // If we return go to infinity loop
+ while(1);
+ 8001074: bf00 nop
+ 8001076: e7fd b.n 8001074
+ 8001078: 08008000 .word 0x08008000
+ 800107c: e000e100 .word 0xe000e100
+
+08001080 :
+}
bool is_app_valid() {
- 8001074: b480 push {r7}
- 8001076: b083 sub sp, #12
- 8001078: af00 add r7, sp, #0
+ 8001080: b480 push {r7}
+ 8001082: b083 sub sp, #12
+ 8001084: af00 add r7, sp, #0
volatile uint32_t* app_vector = (volatile uint32_t*)APP_ADDRESS;
- 800107a: 4b28 ldr r3, [pc, #160] @ (800111c )
- 800107c: 607b str r3, [r7, #4]
+ 8001086: 4b28 ldr r3, [pc, #160] @ (8001128 )
+ 8001088: 607b str r3, [r7, #4]
// Check stack pointer
bool sp_valid = (app_vector[0] >= 0x20000000) &&
- 800107e: 687b ldr r3, [r7, #4]
- 8001080: 681b ldr r3, [r3, #0]
- 8001082: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
- 8001086: d306 bcc.n 8001096
- (app_vector[0] <= (0x20000000 + 128*1024)); // Для STM32 с 128K RAM
- 8001088: 687b ldr r3, [r7, #4]
- 800108a: 681b ldr r3, [r3, #0]
+ 800108a: 687b ldr r3, [r7, #4]
+ 800108c: 681b ldr r3, [r3, #0]
+ 800108e: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
+ 8001092: d306 bcc.n 80010a2
+ (app_vector[0] <= (0x20000000 + 128*1024));
+ 8001094: 687b ldr r3, [r7, #4]
+ 8001096: 681b ldr r3, [r3, #0]
bool sp_valid = (app_vector[0] >= 0x20000000) &&
- 800108c: 4a24 ldr r2, [pc, #144] @ (8001120 )
- 800108e: 4293 cmp r3, r2
- 8001090: d801 bhi.n 8001096
- 8001092: 2301 movs r3, #1
- 8001094: e000 b.n 8001098
- 8001096: 2300 movs r3, #0
- 8001098: 70fb strb r3, [r7, #3]
- 800109a: 78fb ldrb r3, [r7, #3]
- 800109c: f003 0301 and.w r3, r3, #1
- 80010a0: 70fb strb r3, [r7, #3]
+ 8001098: 4a24 ldr r2, [pc, #144] @ (800112c )
+ 800109a: 4293 cmp r3, r2
+ 800109c: d801 bhi.n 80010a2
+ 800109e: 2301 movs r3, #1
+ 80010a0: e000 b.n 80010a4
+ 80010a2: 2300 movs r3, #0
+ 80010a4: 70fb strb r3, [r7, #3]
+ 80010a6: 78fb ldrb r3, [r7, #3]
+ 80010a8: f003 0301 and.w r3, r3, #1
+ 80010ac: 70fb strb r3, [r7, #3]
// check reset_handler
bool pc_valid = (app_vector[1] >= 0x08000000) &&
- 80010a2: 687b ldr r3, [r7, #4]
- 80010a4: 3304 adds r3, #4
- 80010a6: 681b ldr r3, [r3, #0]
- 80010a8: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000
- 80010ac: d307 bcc.n 80010be
- (app_vector[1] <= (0x08000000 + 1024*1024)); // Для 1MB Flash
80010ae: 687b ldr r3, [r7, #4]
80010b0: 3304 adds r3, #4
80010b2: 681b ldr r3, [r3, #0]
+ 80010b4: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000
+ 80010b8: d307 bcc.n 80010ca
+ (app_vector[1] <= (0x08000000 + 1024*1024));
+ 80010ba: 687b ldr r3, [r7, #4]
+ 80010bc: 3304 adds r3, #4
+ 80010be: 681b ldr r3, [r3, #0]
bool pc_valid = (app_vector[1] >= 0x08000000) &&
- 80010b4: f1b3 6f01 cmp.w r3, #135266304 @ 0x8100000
- 80010b8: d801 bhi.n 80010be
- 80010ba: 2301 movs r3, #1
- 80010bc: e000 b.n 80010c0
- 80010be: 2300 movs r3, #0
- 80010c0: 70bb strb r3, [r7, #2]
- 80010c2: 78bb ldrb r3, [r7, #2]
- 80010c4: f003 0301 and.w r3, r3, #1
- 80010c8: 70bb strb r3, [r7, #2]
+ 80010c0: f1b3 6f01 cmp.w r3, #135266304 @ 0x8100000
+ 80010c4: d801 bhi.n 80010ca
+ 80010c6: 2301 movs r3, #1
+ 80010c8: e000 b.n 80010cc
+ 80010ca: 2300 movs r3, #0
+ 80010cc: 70bb strb r3, [r7, #2]
+ 80010ce: 78bb ldrb r3, [r7, #2]
+ 80010d0: f003 0301 and.w r3, r3, #1
+ 80010d4: 70bb strb r3, [r7, #2]
// check two words on reset value
bool not_erased = (app_vector[0] != 0xFFFFFFFF) &&
- 80010ca: 687b ldr r3, [r7, #4]
- 80010cc: 681b ldr r3, [r3, #0]
- 80010ce: f1b3 3fff cmp.w r3, #4294967295
- 80010d2: d007 beq.n 80010e4
- (app_vector[1] != 0xFFFFFFFF);
- 80010d4: 687b ldr r3, [r7, #4]
- 80010d6: 3304 adds r3, #4
+ 80010d6: 687b ldr r3, [r7, #4]
80010d8: 681b ldr r3, [r3, #0]
- bool not_erased = (app_vector[0] != 0xFFFFFFFF) &&
80010da: f1b3 3fff cmp.w r3, #4294967295
- 80010de: d001 beq.n 80010e4
- 80010e0: 2301 movs r3, #1
- 80010e2: e000 b.n 80010e6
- 80010e4: 2300 movs r3, #0
- 80010e6: 707b strb r3, [r7, #1]
- 80010e8: 787b ldrb r3, [r7, #1]
- 80010ea: f003 0301 and.w r3, r3, #1
- 80010ee: 707b strb r3, [r7, #1]
+ 80010de: d007 beq.n 80010f0
+ (app_vector[1] != 0xFFFFFFFF);
+ 80010e0: 687b ldr r3, [r7, #4]
+ 80010e2: 3304 adds r3, #4
+ 80010e4: 681b ldr r3, [r3, #0]
+ bool not_erased = (app_vector[0] != 0xFFFFFFFF) &&
+ 80010e6: f1b3 3fff cmp.w r3, #4294967295
+ 80010ea: d001 beq.n 80010f0
+ 80010ec: 2301 movs r3, #1
+ 80010ee: e000 b.n 80010f2
+ 80010f0: 2300 movs r3, #0
+ 80010f2: 707b strb r3, [r7, #1]
+ 80010f4: 787b ldrb r3, [r7, #1]
+ 80010f6: f003 0301 and.w r3, r3, #1
+ 80010fa: 707b strb r3, [r7, #1]
return sp_valid && pc_valid && not_erased;
- 80010f0: 78fb ldrb r3, [r7, #3]
- 80010f2: 2b00 cmp r3, #0
- 80010f4: d007 beq.n 8001106
- 80010f6: 78bb ldrb r3, [r7, #2]
- 80010f8: 2b00 cmp r3, #0
- 80010fa: d004 beq.n 8001106
- 80010fc: 787b ldrb r3, [r7, #1]
+ 80010fc: 78fb ldrb r3, [r7, #3]
80010fe: 2b00 cmp r3, #0
- 8001100: d001 beq.n 8001106
- 8001102: 2301 movs r3, #1
- 8001104: e000 b.n 8001108
- 8001106: 2300 movs r3, #0
- 8001108: f003 0301 and.w r3, r3, #1
- 800110c: b2db uxtb r3, r3
+ 8001100: d007 beq.n 8001112
+ 8001102: 78bb ldrb r3, [r7, #2]
+ 8001104: 2b00 cmp r3, #0
+ 8001106: d004 beq.n 8001112
+ 8001108: 787b ldrb r3, [r7, #1]
+ 800110a: 2b00 cmp r3, #0
+ 800110c: d001 beq.n 8001112
+ 800110e: 2301 movs r3, #1
+ 8001110: e000 b.n 8001114
+ 8001112: 2300 movs r3, #0
+ 8001114: f003 0301 and.w r3, r3, #1
+ 8001118: b2db uxtb r3, r3
}
- 800110e: 4618 mov r0, r3
- 8001110: 370c adds r7, #12
- 8001112: 46bd mov sp, r7
- 8001114: f85d 7b04 ldr.w r7, [sp], #4
- 8001118: 4770 bx lr
- 800111a: bf00 nop
- 800111c: 08008000 .word 0x08008000
- 8001120: 20020000 .word 0x20020000
+ 800111a: 4618 mov r0, r3
+ 800111c: 370c adds r7, #12
+ 800111e: 46bd mov sp, r7
+ 8001120: f85d 7b04 ldr.w r7, [sp], #4
+ 8001124: 4770 bx lr
+ 8001126: bf00 nop
+ 8001128: 08008000 .word 0x08008000
+ 800112c: 20020000 .word 0x20020000
-08001124 :
+08001130 :
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
- 8001124: b580 push {r7, lr}
- 8001126: b08c sub sp, #48 @ 0x30
- 8001128: af00 add r7, sp, #0
-
- /* USER CODE BEGIN 1 */
- // Настройка GPIO
- RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN;
- 800112a: 4b44 ldr r3, [pc, #272] @ (800123c )
- 800112c: 6b1b ldr r3, [r3, #48] @ 0x30
- 800112e: 4a43 ldr r2, [pc, #268] @ (800123c )
- 8001130: f043 0304 orr.w r3, r3, #4
- 8001134: 6313 str r3, [r2, #48] @ 0x30
- GPIOC->MODER |= GPIO_MODER_MODE10_0 | GPIO_MODER_MODE11_0;
- 8001136: 4b42 ldr r3, [pc, #264] @ (8001240 )
- 8001138: 681b ldr r3, [r3, #0]
- 800113a: 4a41 ldr r2, [pc, #260] @ (8001240 )
- 800113c: f443 03a0 orr.w r3, r3, #5242880 @ 0x500000
- 8001140: 6013 str r3, [r2, #0]
- GPIOC->ODR &= ~GPIO_ODR_OD11;
- 8001142: 4b3f ldr r3, [pc, #252] @ (8001240 )
- 8001144: 695b ldr r3, [r3, #20]
- 8001146: 4a3e ldr r2, [pc, #248] @ (8001240 )
- 8001148: f423 6300 bic.w r3, r3, #2048 @ 0x800
- 800114c: 6153 str r3, [r2, #20]
- GPIOC->ODR |= GPIO_ODR_OD10;
- 800114e: 4b3c ldr r3, [pc, #240] @ (8001240 )
- 8001150: 695b ldr r3, [r3, #20]
- 8001152: 4a3b ldr r2, [pc, #236] @ (8001240 )
- 8001154: f443 6380 orr.w r3, r3, #1024 @ 0x400
- 8001158: 6153 str r3, [r2, #20]
-
- flash_record = load_params();
- 800115a: f7ff fd65 bl 8000c28
- 800115e: 4603 mov r3, r0
- 8001160: 4a38 ldr r2, [pc, #224] @ (8001244 )
- 8001162: 6013 str r3, [r2, #0]
- if(flash_record[firmw].value == UPDATE_FLAG) {
- 8001164: 4b37 ldr r3, [pc, #220] @ (8001244 )
- 8001166: 681b ldr r3, [r3, #0]
- 8001168: 3320 adds r3, #32
- 800116a: 685b ldr r3, [r3, #4]
- 800116c: 4a36 ldr r2, [pc, #216] @ (8001248 )
- 800116e: 4293 cmp r3, r2
- 8001170: d117 bne.n 80011a2
- fw_update = true;
- 8001172: 4b36 ldr r3, [pc, #216] @ (800124c )
- 8001174: 2201 movs r2, #1
- 8001176: 701a strb r2, [r3, #0]
- for(int i = 0; i < 5;i++){
- 8001178: 2300 movs r3, #0
- 800117a: 62fb str r3, [r7, #44] @ 0x2c
- 800117c: e00b b.n 8001196
- GPIOC->ODR ^= GPIO_ODR_OD10; // Indecate message
- 800117e: 4b30 ldr r3, [pc, #192] @ (8001240 )
- 8001180: 695b ldr r3, [r3, #20]
- 8001182: 4a2f ldr r2, [pc, #188] @ (8001240 )
- 8001184: f483 6380 eor.w r3, r3, #1024 @ 0x400
- 8001188: 6153 str r3, [r2, #20]
- HAL_Delay(100);
- 800118a: 2064 movs r0, #100 @ 0x64
- 800118c: f000 fd6a bl 8001c64
- for(int i = 0; i < 5;i++){
- 8001190: 6afb ldr r3, [r7, #44] @ 0x2c
- 8001192: 3301 adds r3, #1
- 8001194: 62fb str r3, [r7, #44] @ 0x2c
- 8001196: 6afb ldr r3, [r7, #44] @ 0x2c
- 8001198: 2b04 cmp r3, #4
- 800119a: ddf0 ble.n 800117e
- }
- // write_param(firmw,0); //reset flasg
- erase_flash_pages();
- 800119c: f7ff fd2a bl 8000bf4
- 80011a0: e00a b.n 80011b8
- }
- else{
- // for st-link update, because he doesnt reset flag_update
- if(is_app_valid()) jump_to_app(); //firmware exist
- 80011a2: f7ff ff67 bl 8001074
- 80011a6: 4603 mov r3, r0
- 80011a8: 2b00 cmp r3, #0
- 80011aa: d002 beq.n 80011b2
- 80011ac: f7ff ff30 bl 8001010
- 80011b0: e002 b.n 80011b8
- else fw_update = true; //firmware doesnt exist, but we in bootloader
- 80011b2: 4b26 ldr r3, [pc, #152] @ (800124c )
- 80011b4: 2201 movs r2, #1
- 80011b6: 701a strb r2, [r3, #0]
- }
-
- GPIOC->ODR |= GPIO_ODR_OD10;
- 80011b8: 4b21 ldr r3, [pc, #132] @ (8001240 )
- 80011ba: 695b ldr r3, [r3, #20]
- 80011bc: 4a20 ldr r2, [pc, #128] @ (8001240 )
- 80011be: f443 6380 orr.w r3, r3, #1024 @ 0x400
- 80011c2: 6153 str r3, [r2, #20]
+ 8001130: b5b0 push {r4, r5, r7, lr}
+ 8001132: b096 sub sp, #88 @ 0x58
+ 8001134: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
- 80011c4: f000 fd0c bl 8001be0
+ 8001136: f000 fd79 bl 8001c2c
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
- 80011c8: f000 f844 bl 8001254
+ 800113a: f000 f8b1 bl 80012a0
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
- 80011cc: f7ff fd6c bl 8000ca8
+ 800113e: f7ff fdb3 bl 8000ca8
MX_TIM1_Init();
- 80011d0: f000 fa8a bl 80016e8
+ 8001142: f000 faf7 bl 8001734
MX_USART1_UART_Init();
- 80011d4: f000 fc68 bl 8001aa8